Differential RF Frequency Multiplier With Low-Voltage Harmonic Coupling

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Solution Overview

Problem

Existing frequency multiplier circuits face issues with instability, temperature dependence, and high DC supply voltage due to unbalanced transistor configurations and stacking, which affect conversion gain and fundamental suppression.

Innovation Solution

A frequency multiplier circuit design featuring a first and second differential pair of amplifier elements with separate DC and RF connections, utilizing quarter and half-wavelength transmission lines to block DC and allow harmonic frequency signals, reducing DC supply voltage and improving stability through fully differential coupling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If unbalanced transistor configurations and stacking are used in frequency multiplier circuits, then DC supply voltage is reduced, but stability and temperature dependence deteriorate

Engineering Contradiction:
ImproveDC supply voltageVSAvoidstability
Core Design Contradiction:
Use of energy by stationary objectVSReliability

Solution Approach 1:

The circuit is divided into two separate stages: a first differential pair stage and a second differential pair stage. Each stage has its own independent DC supply voltage connection, avoiding the stacking configuration. This segmentation allows each stage to be optimized independently while maintaining overall circuit stability and reducing temperature dependence.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If unbalanced transistor configurations are used, then device complexity is reduced, but conversion gain and fundamental suppression deteriorate

Engineering Contradiction:
Improvetransistor configurationVSAvoidconversion gain
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The invention employs fully balanced differential pair configurations where transistors are arranged symmetrically with matched parameters. This asymmetry principle is applied in reverse - by deliberately creating symmetry in the transistor arrangements, the circuit achieves improved conversion gain and fundamental suppression while maintaining manageable complexity through the regular, repeating structure of the differential pairs.

Inventive Principle:
Principle #4Asymmetry

3Use of energy by stationary object

If stacked transistor configuration is used, then DC supply voltage requirement is reduced, but power consumption increases

Engineering Contradiction:
ImproveDC supply voltageVSAvoidpower consumption
Core Design Contradiction:
Use of energy by stationary objectVSLoss of energy

Solution Approach 1:

The circuit is divided into two separate stages: a first differential pair stage and a second differential pair stage. Each stage has its own independent DC supply voltage connection, avoiding the stacking configuration. This segmentation allows each stage to be optimized independently while maintaining overall circuit stability and reducing temperature dependence.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design achieves high conversion efficiency with low fundamental signal feedthrough and improved common-mode stability, reducing DC supply voltage and power consumption while maintaining balanced operation.

Implementation Method 1

utilizing quarter and half-wavelength transmission lines to block DC and allow harmonic frequency signals

Methodology Applied
Scientific EffectTransmission line resonance: Resonance

Data Source

PatentUS8330506B2Frequency multiplier circuit
Publication Date: 2012.12.11 NXP USA INC
  • US8330506B2 patent drawing
  • US8330506B2 patent drawing
  • US8330506B2 patent drawing

AI summary

A frequency multiplier circuit, comprising a first stage including a first differential pair of amplifier elements having respective current conduction paths connected in parallel between first and second nodes and respective control terminals connected to receive input signals of opposite polarity at an input frequency in the radio frequency range, the first and second nodes being connected to respective bias voltage supply terminals through first and second impedances respectively so that current flowing differentially in the current conduction paths of the first differential pair of amplifier elements produces a voltage difference across the first and second nodes at a frequency which contains a harmonic of the input frequency, and a second stage including a second differential pair of amplifier elements coupled at the harmonic of the input frequency with the first and second nodes to amplify differentially the voltage difference and produce an output signal at the harmonic of the input frequency. Radio frequency connections apply the voltage difference across the first and second nodes at the frequency of the harmonic to the second differential pair of amplifier elements and block direct current, and separate direct current connections connect respectively the first differential pair of amplifier elements and the second differential pair of amplifier elements across the bias voltage supply terminals.