Differential Sampling Circuit With Higher Equivalent Input Resistance
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Solution Overview
Problem
Existing analog-to-digital converter circuits face challenges in achieving a sufficiently high equivalent input resistance, which affects the accuracy and speed of the conversion process.
Innovation Solution
The proposed sampling circuit includes a series of capacitors and switch circuits that allow for a differential input voltage to be sampled during a sampling operation, with specific switch configurations during reset and sampling operations to manage charge distribution and equivalent input resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional reset operation is performed to discharge charge in capacitive elements, then the initial charge is set to zero, but the equivalent input resistance cannot be sufficiently increased
Solution Approach 1:
The switch circuit is divided into multiple independent switch elements (first switch element, second switch element, third switch element, fourth switch element) that can be controlled independently. This segmentation allows different switch combinations to be used for different operations (reset vs. sampling), enabling the circuit to achieve high equivalent input resistance during sampling while maintaining operational flexibility.
Solution Approach 2:
The circuit dynamically changes its configuration between reset operation and sampling operation by controlling different switch states. During reset operation, specific switches are activated to discharge capacitors; during sampling operation, different switches are activated to achieve high equivalent input resistance. This dynamic reconfiguration resolves the contradiction between operational requirements and resistance requirements.
2Measurement precision
If the equivalent input resistance is increased to improve conversion accuracy, then the sampling operation time may be extended
Solution Approach 1:
The circuit changes its electrical parameters (equivalent input resistance) dynamically based on the operational phase. During sampling operation, the circuit configuration is optimized to provide high equivalent input resistance, ensuring accurate voltage sampling without excessive time penalty. The switch circuit design allows rapid charging/discharging paths that maintain high resistance during the critical sampling moment while enabling quick transition between states.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively increases the equivalent input resistance of the analog-to-digital converter circuit, improving the accuracy and reducing the sampling operation time of the conversion process.
Implementation Method 1
a first capacitor including a first terminal and a second terminal; a second capacitor including a third terminal and a fourth terminal
Data Source
AI summary
A sampling circuit includes: a first capacitor including a first terminal and a second terminal; a second capacitor including a third terminal and a fourth terminal; a first input node configured to receive a first input voltage that is one of a differential input voltage; a second input node configured to receive a second input voltage that is the other of the differential input voltage; a first switch circuit configured to be provided between the first input node and the first terminal; a second switch circuit configured to be provided between the second input node and the third terminal; a third switch circuit configured to be provided between the first terminal and the third terminal; and a fourth switch circuit configured to be provided between the second terminal and the fourth terminal.