Differential Signal Rectifier Circuit with Shared Detection Branch
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Solution Overview
Problem
Existing signal-processing circuits for rectification and peak detection are inefficient due to high area occupation, component mismatch, and increased amplitude of output-voltage ripple, as they require replication of peak-detector circuits and operate as half-wave rectifiers, limiting dynamic range and accuracy.
Innovation Solution
A signal-processing circuit that uses four voltage-controlled current generators and resistors to process both differential input signals as a full-wave rectifier, allowing for simultaneous detection of positive and negative peaks with reduced ripple and component matching issues, implemented in a single integrated circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If separate peak-detector circuit branches are used for each differential input signal, then peak detection can be performed, but area occupation increases and component mismatch occurs
Solution Approach 1:
The patent combines both peak detection functions into a single shared circuit branch rather than using separate branches for each differential input signal. The circuit alternately processes VP(t) and VM(t) signals through the same detection path, which reduces area occupation and eliminates component mismatch between separate branches while maintaining accurate peak detection capability.
Solution Approach 2:
The single detection circuit branch is designed to universally handle both differential input signals VP(t) and VM(t) by alternately switching between them. This multi-functional approach allows one circuit to perform what traditionally required two separate circuits, reducing overall circuit complexity and component count.
2Device complexity
If half-wave rectification is used in separate circuit branches, then simple circuit design is achieved, but output-voltage ripple amplitude increases and dynamic range is limited
Solution Approach 1:
The circuit implements continuous full-wave rectification by alternately processing both VP(t) and VM(t) signals through the same detection branch. Instead of idle periods between half-wave cycles, the circuit continuously processes signal information from both differential inputs, eliminating ripple and expanding dynamic range while maintaining design simplicity.
3Reliability
If separate detection circuit branches are used, then independent peak detection is possible, but manufacturing precision requirements increase due to component matching
Solution Approach 1:
By merging both detection functions into a single circuit branch with shared components, the patent eliminates the need for precise matching between separate branches. All detection components are common to both signals, automatically ensuring consistency and reducing manufacturing precision requirements while maintaining reliable peak detection capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The circuit achieves efficient detection of peak amplitudes with reduced ripple and improved component matching, enabling the use of lower-value passive components and compact integration, effectively addressing the limitations of traditional circuits.
Implementation Method 1
four voltage-controlled current generators (14a-14d), which are voltage-controlled by the first differential signal Vp(t) or by the second differential signal VM(t), and supply at output a unidirectional current flow
Data Source
Figure 1~3
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Figure 6~7
AI summary
A signal-processing circuit (10) has a first and a second input (11a, 11b), which receive a first and a second differential signal (VP ,VM), a third input (11c), which receives a common-mode signal (VCM), the first and second differential signals (VP, VM) having an equal and substantially opposite trend with respect to the common-mode signal (VCM), and a first output (12a) supplying a first processed signal (Vpp), equivalent to the first differential signal (VP) rectified with respect to the common-mode signal (VCM), and satisfying throughout its course a first relation of comparison with the common-mode signal. The processing circuit (10) is provided with first formation means (14a, 16, 18) for formation of the first processed signal (Vpp), which operate on the basis of the first differential signal (VP), and second formation means (14b, 16, 18) for formation of the first processed signal (VPP), which operate on the basis of the second differential signal (VM); the first and second formation means co-operate in the formation of the first processed signal.