Differential Stage Bias Circuit for Stable Gm Under Overdrive
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Differential input stages for operational amplifiers face challenges in maintaining effective transconductance when overdriven, as the incremental transconductance (Gm) is reduced to zero for large overdrives, and is heavily dependent on manufacturing variability and resistor values.
Innovation Solution
A differential stage with a special bias generator circuit that sets operating currents in input stage transistors, making incremental Gm primarily a function of a single resistor, reducing standing bias current and accommodating manufacturing variability, thereby normalizing Gm and maintaining it under overdrive conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If FETs are strongly biased to make individual Gms large, then the effective Gm of the input stage is dominated by resistance R, but this requires a relatively high standing bias current
Solution Approach 1:
The patent changes the biasing parameters by introducing a bias generator circuit that dynamically adjusts the bias currents to achieve optimal Gm performance at lower standing bias currents. The bias generator uses transistors with specific W/L ratios and resistors to control the operating point of input stage transistors, allowing the circuit to maintain reliability with reduced power consumption.
2Productivity
If resistance R is made small, then the differential Gm becomes a function of the properties of the FETs and bias currents, but these are subject to manufacturing variability
Solution Approach 1:
The bias generator circuit implements feedback mechanisms where the bias currents are automatically adjusted based on the operating conditions to maintain consistent Gm performance. The circuit monitors the state of input stage transistors and compensates for variations, ensuring that differential Gm remains stable despite manufacturing tolerances in FET properties and resistor values.
3Power
If the input stage is overdriven, then the difference current output is limited to the tail current, but the Gm is essentially reduced to zero for large overdrives
Solution Approach 1:
The patent employs dynamic biasing where the bias currents are not fixed but are adjusted in response to the input signal conditions. The bias generator circuit modifies the operating point of input stage transistors during overdrive conditions to maintain better linearity and prevent Gm from collapsing to zero, while still allowing the circuit to handle large current outputs.
Data Source
AI summary
A differential stage which uses a bias generator circuit to set the operating currents of the input stage FETs to make the incremental Gm primarily a function of a single resistor embedded in the biasing circuit, such that the input stage has a Gm which only gradually departs from nominal under overdrive, and continues to supply output currents which increase with an increasing differential input signal.