Differential Switch Topology for High OFF Isolation and Bandwidth
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Solution Overview
Problem
Differential switching circuits face a tradeoff between high OFF isolation and large bandwidth, with existing designs often compromising on one or the other, limiting their application environments.
Innovation Solution
Incorporating cross-coupled capacitors and additional switching circuits with specific sizing and equivalent series resistance to mitigate parasitic capacitance effects, allowing for high OFF isolation and wide bandwidth simultaneously.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If cross-coupled capacitors are added to improve OFF isolation, then OFF isolation is improved, but bandwidth deteriorates
Solution Approach 1:
The patent introduces additional switching circuits (third and fourth switches) as intermediary elements that control the connection of capacitors (first and second capacitors) to the signal path. These intermediary switches enable the capacitors to be connected only when needed for isolation, rather than being permanently connected which would limit bandwidth. The intermediary switches act as mediators between the isolation requirement and bandwidth requirement.
Solution Approach 2:
The patent makes the capacitor connections dynamic rather than static. The third and fourth switches dynamically connect or disconnect the first and second capacitors based on the operational state. When the first and second switches are off, the third and fourth switches connect the capacitors to provide isolation; when the first and second switches are on, the capacitors are disconnected to preserve bandwidth. This dynamic adjustment resolves the contradiction between isolation and bandwidth.
2Reliability
If additional switching circuits and capacitors are incorporated to achieve high OFF isolation, then OFF isolation is improved, but device complexity increases
Solution Approach 1:
The patent segments the isolation function into separate controllable components rather than using a single complex isolation mechanism. The isolation function is divided into: first and second switches for primary signal switching, third and fourth switches for capacitor control, and first and second capacitors for isolation. Each segment is independently controlled and optimized, making the overall system more manageable despite the increased number of components.
Solution Approach 2:
The third and fourth switches serve multiple functions: they control the connection of capacitors for isolation purposes, and they also affect the overall signal path configuration. The capacitors serve dual purposes of providing isolation when connected and not interfering with signal transmission when disconnected. This multi-functionality reduces the need for entirely separate isolation circuits, thereby limiting the increase in complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves OFF isolation of about −53.49 decibels for signals at 250 MHz with a bandwidth of 2.625 GHz, enhancing performance in environments requiring both high isolation and wide bandwidth.
Implementation Method 1
a first capacitor coupled in series between the second terminal of the third switch and the second terminal of the second switch
Data Source
AI summary
In some examples, a circuit includes a first transistor having a control terminal and first and second terminals, the first terminal of the first transistor coupled to a first input terminal, and the second terminal of the first transistor coupled to a first output terminal. The circuit also includes a second transistor having a control terminal and first and second terminals, the first terminal of the second transistor coupled to a second input terminal, and the second terminal of the second transistor coupled to a second output terminal. The circuit also includes a third transistor having a control terminal and first and second terminals, the first terminal of the third transistor coupled to the first input terminal. The circuit also includes a first capacitor having first and second terminals, the first terminal of the first capacitor coupled to the second terminal of the third transistor, and the second terminal of the first capacitor coupled to the second output terminal. The circuit also includes a second capacitor having first and second terminals, the first terminal of the second capacitor coupled to the second input terminal. The circuit also includes a fourth transistor having a control terminal and first and second terminals, the first terminal of the fourth transistor coupled to the second terminal of the second capacitor, and the second terminal of the fourth transistor coupled to the first output terminal.