Semiconductor device having a plurality of terminals arranged thereon
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Solution Overview
Problem
The challenge is to enhance the signal transmission speed and miniaturization of electronic devices while maintaining stability in power supply and reducing the physical size, as increased transmission speed often leads to larger device sizes due to the need for more signal transmission paths and power supply stabilization.
Innovation Solution
The solution involves a semiconductor device with a logic circuit and a memory circuit mounted on a wiring substrate, utilizing a high-density arrangement of differential pair terminals and power source terminals, along with a robust wiring substrate structure that includes multiple layers and through-hole wirings to support high-frequency signal transmission and stable power distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the transmission speed is increased, then the signal transmission performance is improved, but the size of the electronic device increases
Solution Approach 1:
The patent transitions from planar terminal arrangement to three-dimensional stacking, where terminals are arranged not only on the surface but also on the side surfaces of the semiconductor device. This vertical dimension utilization allows more signal transmission paths to be packed into the same footprint area, improving transmission speed without increasing the device's planar size.
Solution Approach 2:
The patent implements nested wiring structures where multiple wiring layers are stacked vertically, with each layer containing signal lines and power lines. The wiring layers are nested within the semiconductor device body, allowing multiple signal transmission paths to be contained within a compact volume, thus increasing transmission capability without proportionally increasing device size.
2Speed
If a large number of signal transmission paths are implemented in high density, then the transmission speed is improved, but the power supply stability becomes difficult to maintain
Solution Approach 1:
The patent applies different wiring configurations to different regions of the semiconductor device. Power supply lines are concentrated in specific areas with sufficient spacing, while signal lines are densely packed in other regions. This localized differentiation allows high-density signal transmission in signal-rich areas while maintaining power supply stability in dedicated power regions.
Solution Approach 2:
The patent segments the wiring into distinct functional layers: power supply wiring layers, signal transmission wiring layers, and ground wiring layers. This segmentation isolates power supply paths from signal paths, preventing electromagnetic interference and maintaining power stability even when signal lines are densely packed for high-speed transmission.
3Productivity
If the number of terminals is increased, then the signal transmission capability is improved, but the terminal arrangement density becomes insufficient
Solution Approach 1:
The patent extends terminal arrangement from two-dimensional surface mounting to three-dimensional configuration by placing terminals on both the top surface and side surfaces of the semiconductor device. This multi-surface arrangement dramatically increases the effective terminal area without increasing the device's footprint, allowing more signal transmission paths to be implemented.
Solution Approach 2:
The patent combines multiple wiring functions into integrated wiring structures where signal lines, power lines, and ground lines are systematically organized across multiple layers. This merging of wiring functions into a cohesive multi-layer architecture maximizes the utilization of available terminal space and improves overall signal transmission capability.
Data Source
AI summary
The electronic device includes a first semiconductor device having a logic circuit, a second semiconductor device having a memory circuit, and a wiring substrate to which the first and second semiconductor devices are mounted. The first semiconductor device has a plurality of terminals arranged on a main surface. The plurality of terminals includes a plurality of differential pair terminals electrically connected to the second semiconductor device and to which differential signals are transmitted. The plurality of differential pair terminals is arranged along a side of the main surface, that is extending in an X direction, and includes a first differential pair terminal constituted by a pair of terminals arranged along a Y direction orthogonal to the X direction, and a second differential pair terminal constituted by a pair of terminals arranged along the Y direction. The first and second differential pair terminals are arranged along the Y direction.