Differential Delay Cell VCO for High Frequency With Lower Gain
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Solution Overview
Problem
Conventional voltage controlled ring oscillators in phase locked loop circuits face challenges in achieving a high center frequency with a small gain, as reducing the number of delay cells or decreasing node capacitance increases consumption current and gain, making it difficult to meet the requirements of high-speed electronic devices.
Innovation Solution
The implementation of a voltage controlled oscillator comprising first and second differential delay cells, where the second differential delay cell has a fixed delay time and is disconnected from the control voltage input of the first differential delay cell, allowing for adjustable and fixed voltage signals to control the delay times of the cells, thereby reducing the overall gain while maintaining a high center frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the number of delay cells is decreased to increase center frequency, then the center frequency increases, but the gain increases and consumption current increases
Solution Approach 1:
The voltage control input terminals are segmented into multiple independent groups, where each group controls a specific delay cell. This allows selective control of delay cells rather than uniform control, enabling the system to achieve high center frequency with reduced gain by adjusting only necessary cells while keeping others at optimal settings for low phase jitter.
Solution Approach 2:
Different delay cells are assigned different control voltages with different levels according to their specific functions. Some delay cells receive higher control voltages to reduce their delay time and increase center frequency, while others receive lower control voltages to maintain larger delay times and reduce gain. This local differentiation resolves the contradiction between high center frequency and low gain.
2Speed
If the node capacitance is decreased to increase center frequency, then the center frequency increases, but the consumption current increases
Solution Approach 1:
The segmentation of voltage control inputs allows the system to achieve frequency adjustment without uniformly decreasing node capacitance across all cells. By controlling individual cells with different voltages, the system can increase center frequency through optimized delay distribution rather than through capacitance reduction, thereby avoiding increased consumption current.
3Speed
If the current of each delay cell is increased to increase center frequency, then the center frequency increases, but the gain increases and consumption current increases
Solution Approach 1:
Different delay cells operate with different current levels tailored to their specific roles. Cells that need faster switching receive higher currents, while cells that need to provide stable delay receive lower currents. This local optimization allows the system to achieve high center frequency without uniformly increasing current across all cells, thereby maintaining low gain and low phase jitter.
4Device complexity
If all delay cells are controlled by the same control voltage, then the control is simple, but the gain is large and phase jitter increases
Solution Approach 1:
The control structure is segmented into multiple independent voltage control inputs, each managing specific delay cells. This segmentation increases control precision, allowing the system to reduce gain and phase jitter by applying optimized control voltages to different cells. The increased control granularity directly addresses the phase jitter issue while maintaining manageable complexity through modular control architecture.
Data Source
AI summary
A voltage controlled oscillator comprising first and second differential delay cells. The first differential delay cell has a first control voltage input terminal. The second differential delay cell is coupled to the first differential delay cell in a loop and has a second control voltage input terminal. The second voltage input terminal is disconnected from the first voltage control input terminal. The first voltage control input terminal receives a first voltage signal, and the second voltage control input terminal receives a second voltage signal different from the first voltage signal.