Differential Wake-Up Receiver With Common-Mode Noise Attenuation
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Solution Overview
Problem
Existing wake-up receivers for CAN systems face challenges in detecting wake-up signals at low supply voltages, especially in noisy automotive environments, due to limitations in supply headroom and susceptibility to common mode noise.
Innovation Solution
A differential input receiver is designed with a cross-coupled differential amplifier and resistive dividers to attenuate common mode noise, allowing for effective wake-up signal detection even at low supply voltages. This design includes diode-connected FETs and cross-differential FETs to achieve high gain while minimizing current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional wake-up receiver designs are used, then the receiver can operate at low supply voltages, but the detection reliability deteriorates due to insufficient supply headroom and susceptibility to common mode noise
Solution Approach 1:
The receiver is segmented into distinct functional blocks: resistive dividers for common mode noise attenuation, differential amplifier for signal amplification, and threshold detector for wake-up signal detection. This segmentation allows each block to be optimized independently, enabling reliable detection at low supply voltages by ensuring the differential amplifier receives sufficient headroom despite the overall low supply voltage.
Solution Approach 2:
Resistive dividers are introduced as intermediary components between the differential input and the differential amplifier. These dividers attenuate common mode noise before it reaches the amplifier, acting as a mediator that protects the sensitive amplification stage from noise while allowing the amplifier to operate with adequate supply headroom.
2Measurement precision
If conventional amplifier designs are used, then the receiver can amplify wake-up signals, but the common mode noise susceptibility increases, reducing detection accuracy
Solution Approach 1:
Resistive dividers serve as intermediary components that attenuate common mode noise before it reaches the differential amplifier. By placing these dividers in the signal path, common mode noise is reduced at the amplifier input, improving detection accuracy without requiring changes to the amplifier itself.
Solution Approach 2:
The resistive dividers are specifically configured with different resistance values for the positive and negative input paths. This asymmetric configuration creates different attenuation characteristics for common mode signals versus differential wake-up signals, locally optimizing the noise rejection property at the input stage while preserving signal integrity.
3Measurement precision
If high gain amplification is implemented, then wake-up signal detection sensitivity improves, but the device complexity increases due to additional components required
Solution Approach 1:
The differential amplifier and threshold detector functions are merged into a single integrated circuit block. The amplifier simultaneously performs signal amplification and threshold comparison, eliminating the need for separate amplifier and comparator circuits. This merging reduces overall device complexity while maintaining high detection sensitivity through the combined functionality.
Data Source
AI summary
A differential input receiver for detecting wake-up signalling in a differential communication system. The receiver has a first and a second diode connected FET. The source of the first diode connected FET is connected to a positive input signal terminal. The drain of the first diode connected FET is connected to a first current source. The gate of the first diode connected FET is connected to the first current source. The source of the second diode connected FET is connected to a negative input signal terminal. The drain of the second diode connected FET is connected to a second current source. The gate of the second diode connected FET is connected to the second current source. The receiver also included a first and a second cross differential FET. The source of the first cross differential FET is connected to the negative input signal terminal. The drain of the first cross differential FET is connected to a first output terminal. The gate of the first cross differential FET is connected to the gate of the first diode connected FET. The source of the second cross differential FET is connected to the positive input signal terminal. The drain of the second cross differential FET is connected to a second output terminal. The gate of the second cross differential FET is connected to the gate of the second diode connected FET.