Differential Signal Wiring Insulation for Package Impedance Control
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Solution Overview
Problem
Existing semiconductor packages face challenges in maintaining signal integrity due to interference between connection terminals, particularly in highly integrated semiconductor chips with increased numbers of connection terminals, necessitating improved designs to prevent such interference.
Innovation Solution
The semiconductor package incorporates a pair of differential signal wiring lines surrounded by a first and second wiring insulating layer with different dielectric constants, along with equipotential plates and redistribution layers to control impedance and adjust target impedance, enhancing signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If connection terminals are placed closer together to increase integration, then device density improves, but signal interference between terminals increases
Solution Approach 1:
The patent applies local quality by using different dielectric materials with different relative dielectric constants in different regions around the differential signal wiring lines. The first wiring insulating layer with a lower dielectric constant is positioned closer to the signal lines, while the second wiring insulating layer with a higher dielectric constant is positioned farther away, creating a localized gradient that optimizes signal integrity while maintaining high terminal density.
Solution Approach 2:
The patent changes the dielectric parameter (relative dielectric constant) of the insulating layers to control impedance and reduce signal interference. By selecting materials with specific dielectric constants (first layer: lower constant, second layer: higher constant), the patent optimizes the electrical characteristics of the connection terminals while maintaining high integration density.
2Ease of manufacture
If a single uniform wiring insulating layer is used, then manufacturing simplicity is maintained, but impedance control and signal integrity deteriorate
Solution Approach 1:
The patent uses composite materials by combining two different wiring insulating layers with different dielectric properties. The first wiring insulating layer (lower dielectric constant) and the second wiring insulating layer (higher dielectric constant) are stacked together to form a composite structure that provides both impedance control and signal interference reduction, while maintaining manufacturing feasibility through standard layering processes.
3Manufacturing precision
If wiring insulating layers with different dielectric constants are used, then impedance control improves, but manufacturing complexity increases
Solution Approach 1:
The patent segments the wiring insulating layer into two distinct layers with different dielectric constants. The first wiring insulating layer is positioned adjacent to the differential signal wiring lines, and the second wiring insulating layer is positioned above the first layer. This segmentation allows for precise impedance control through material selection while maintaining a structured, manageable manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively improves signal integrity by adjusting capacitance and impedance through varying dielectric constants, ensuring optimal performance in high-density semiconductor packages.
Implementation Method 1
The first wiring insulating layer and the second wiring insulating layer include different materials... A first relative dielectric constant of the first wiring insulating layer is less than a second relative dielectric constant of the second wiring insulating layer
Data Source
AI summary
A semiconductor package is provided. The semiconductor package includes: a lower equipotential plate provided in a lower wiring layer; an upper equipotential plate provided in an upper wiring layer; a pair of differential signal wiring lines provided in a signal wiring layer that is between the lower equipotential plate and the upper equipotential plate, wherein the pair of differential signal wiring lines includes a first differential signal wiring line and a second differential signal wiring line which are spaced apart from each other and extend in parallel; and a wiring insulating layer surrounding the pair of differential signal wiring lines, and filling between the signal wiring layer, the lower wiring layer, and the upper wiring layer. The wiring insulating layer includes a first wiring insulating layer surrounding the pair of differential signal wiring lines, and a second wiring insulating layer, and the first wiring insulating layer and the second wiring insulating layer include different materials.


