Differentiated Ceramic Circuit Carrier for Power and Logic Integration
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Solution Overview
Problem
Existing electronic units face challenges in achieving high operational reliability, compact design, and integration density due to the limitations of coarse conductor structures in AMB and DBC substrates, which are not suitable for logic and control components requiring finer conductor structures.
Innovation Solution
A ceramic circuit carrier with differentiated structural areas, where the first area meets high electrical, thermal, and mechanical requirements for power electronics and the second area is designed for logic and control circuits with finer structuring, allowing for electrical insulation and efficient integration of components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thick copper metallization is used for high current carrying capacity, then thermal and electrical performance is improved, but conductor structure becomes coarse and unsuitable for logic components
Solution Approach 1:
The circuit carrier is divided into two distinct areas: a first area with thick copper metallization (300-1000 μm) for power electronics, and a second area with thin copper metallization (10-50 μm) for logic and control components. This segmentation allows each area to have optimized conductor structure appropriate for its specific functional requirements.
Solution Approach 2:
Different metallization thicknesses are applied to different areas of the circuit carrier based on local functional requirements. The first area has thick metallization for high current carrying capacity, while the second area has thin metallization for fine conductor structures, achieving local optimization of both current capacity and structural fineness.
2Manufacturing precision
If separate circuit boards are used for power electronics and logic electronics, then conductor structure requirements are met, but electrical inductance increases and integration density decreases
Solution Approach 1:
Both power electronics and logic/control electronics are integrated onto a single circuit carrier with differentiated metallization areas. This merging eliminates the need for separate circuit boards and interconnections, reducing electrical inductance and increasing integration density while maintaining the required conductor structure fineness for logic components.
3Temperature
If thick copper metallization is used, then thermal performance is improved, but manufacturing cost and production complexity increase
Solution Approach 1:
Thick copper metallization is applied only in the first area where high thermal and electrical performance is required for power electronics, while thin metallization is used in the second area for logic components. This local quality approach optimizes thermal performance where needed while reducing material costs and production complexity in areas where thick metallization is not required.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the integration of power and logic/control sections on a single circuit carrier, reducing electrical inductances, production costs, and increasing integration density while meeting diverse component requirements.
Implementation Method 1
removing metallic material of the metal layer or metal foil via a laser ablation process in the area of the second height plateau of the step
Implementation Method 2
forming an intermediate stage of a conductor structure in the metal layer or metal foil by an etching process
Implementation Method 3
applying a metal layer or metal foil, in particular made of copper or a copper alloy, using the DCB or active brazing process
Implementation Method 4
applying a metal layer or metal foil, in particular made of copper or a copper alloy, using the DCB or active brazing process
Data Source
Figure 1
Figure 2a~2c
AI summary
The starting point is a ceramic circuit carrier with a ceramic substrate, in particular a DBC (Direct Bonded Copper) or an AMB (Active Metal Brazing) circuit carrier, wherein the substrate has a top and a bottom surface, and at least one conductor structure comprising at least one layer of copper or a copper alloy is arranged on the top and/or bottom surface. The conductor structure has an outermost termination surface and, in a perpendicular section to the top and/or bottom surface, projects a height from the top or bottom surface to the outermost termination surface. Furthermore, the conductor structure has at least a first structural region with a first height dimension and at least a second structural region with a second height dimension, wherein the second height dimension is smaller than the first height dimension and the first and second structural regions are electrically insulated from each other by the ceramic substrate.