Differentiated Conductive Lines for Sub-15 nm Interconnect Scaling
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Solution Overview
Problem
The scaling of features in integrated circuits faces challenges due to variability in conventional fabrication processes, limiting the extension into the 15 nanometer node or sub-15 nanometer node range.
Innovation Solution
The implementation of a dual metal scheme using ruthenium for tighter pitch metal lines and copper for wider metal lines in SRAM bitlines, allowing for lower resistance and reduced capacitance, along with the use of pitch quartering and halving approaches for precise patterning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication processes are used for scaling, then manufacturing simplicity is maintained, but manufacturing precision deteriorates at 15 nanometer node or sub-15 nanometer node range
Solution Approach 1:
The patent divides the metal interconnect layer into multiple segments with different materials (copper and ruthenium) and different pitches. Copper is used for wider metal lines with larger pitch, while ruthenium is used for tighter pitch metal lines. This segmentation allows each material to be optimized for its specific pitch range, achieving manufacturing precision at 15nm node and below without requiring entirely new fabrication processes.
Solution Approach 2:
The patent applies different material properties to different spatial locations within the same metal layer. Specifically, copper is placed in regions with wider pitch where it provides lower resistance, while ruthenium is placed in regions with tighter pitch where it provides better patterning control. This local differentiation of material quality enables precise manufacturing at advanced nodes while maintaining overall process compatibility.
2Reliability
If single material is used for all metal lines, then device complexity is reduced, but electrical performance deteriorates due to higher resistance and capacitance
Solution Approach 1:
The patent implements local quality by assigning different materials (copper and ruthenium) to different metal lines based on their pitch and electrical performance requirements. Copper is used for wider metal lines where low resistance is critical, while ruthenium is used for tighter pitch lines where capacitance reduction and patterning precision are more important. This localized material assignment optimizes electrical performance across the entire interconnect network.
Solution Approach 2:
The patent creates a composite material system within a single metal layer by combining copper and ruthenium in specific patterns. This composite approach allows the interconnect structure to leverage the advantageous properties of both materials: copper's excellent electrical conductivity for power and signal distribution, and ruthenium's superior patterning characteristics and lower capacitance for dense interconnects.
3Manufacturing precision
If current lithography resolution capabilities are used, then manufacturing simplicity is maintained, but manufacturing precision deteriorates for tighter pitched patterns
Solution Approach 1:
The patent changes the material parameter (using ruthenium instead of copper) for tighter pitch metal lines to enable manufacturing precision that exceeds current lithography resolution capabilities. Ruthenium's different physical and chemical properties allow for self-aligned patterning and etching processes that can achieve sub-15nm pitch precision without requiring advanced lithography equipment, thus maintaining ease of manufacture while improving pattern precision.
Data Source
AI summary
Embodiments of the disclosure are in the field of integrated circuit structure fabrication. In an example, an integrated circuit structure includes a plurality of conductive lines on a same level and along a same direction, a first one of the plurality of conductive lines having a first width and a first composition, and a second one of the plurality of conductive lines having a second width and a second composition. The second width greater than the first width, and the second composition is different than the first composition. The second one of the plurality of conductive lines has an uppermost surface above an uppermost surface of the first one of the plurality of conductive lines.