Diffusion Barrier Integrity Testing via Selective Etching
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Solution Overview
Problem
The existing methods for forming electrically conductive lines in semiconductor structures often result in diffusion barrier layers with pores, leading to insufficient filling of contact vias, increased electrical resistance, and a higher likelihood of electromigration and stress migration, which can negatively affect the integrity of the conductive lines.
Innovation Solution
A method involving a semiconductor structure with a feature comprising a first material and a layer of a second material, where the structure is exposed to an etchant that selectively removes the first material, allowing detection of etching effects to assess the integrity of the second material layer, potentially indicating the presence of pores.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a diffusion barrier layer is formed over an electrically conductive feature, then adhesion between the conductive material and dielectric layer is improved, but pores may form in the barrier layer leading to insufficient filling of contact vias
Solution Approach 1:
The patent applies preliminary action by performing an integrity test on the diffusion barrier layer before proceeding with contact via formation. The etching process is used as a test mechanism to detect potential pores or defects in the barrier layer, allowing for early identification and correction of integrity issues before they affect subsequent manufacturing steps.
Solution Approach 2:
The patent introduces an intermediary testing process between barrier layer formation and contact via formation. The etchant acts as an intermediary agent that reveals barrier layer defects without permanently damaging the structure, enabling quality assessment before critical subsequent steps.
2Ease of manufacture
If the diffusion barrier layer contains pores, then the layer formation process is simpler, but voids form in contact vias increasing electrical resistance
Solution Approach 1:
The integrity test using selective etching is performed as a preliminary action before contact via formation. This allows detection of barrier layer pores that would otherwise lead to void formation and increased electrical resistance, enabling corrective measures to be taken before the critical via filling step.
Solution Approach 2:
The patent implements feedback by using the etching process to reveal barrier layer defects and using this information to adjust subsequent manufacturing parameters. The detection of pores through selective etching provides feedback that can trigger process adjustments to prevent void formation in contact vias.
3Reliability
If the diffusion barrier layer is intact, then electromigration and stress migration are prevented, but detecting pores requires complex inspection methods
Solution Approach 1:
The patent uses selective etching as an intermediary testing method that simplifies pore detection. The etchant selectively removes material to reveal pores in the barrier layer, transforming a difficult inspection problem into a more manageable process that can be integrated into the manufacturing flow without requiring complex external inspection equipment.
Solution Approach 2:
The patent replaces complex mechanical or optical inspection systems with a chemical etching process for pore detection. The selective etching chemistry substitutes for sophisticated detection equipment, providing a simpler, more integrated method for assessing barrier layer integrity that can be performed inline with manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach helps reduce the formation of voids in contact vias, minimizing electrical resistance and the risk of electromigration and stress migration, thereby enhancing the reliability of the electrically conductive lines.
Implementation Method 1
The semiconductor structure is exposed to an etchant. The etchant is adapted to selectively remove the first material relative to the second material.
Data Source
AI summary
A method comprises providing a semiconductor structure. The semiconductor structure comprises a feature comprising a first material and a layer of a second material formed over the feature. The semiconductor structure is exposed to an etchant. The etchant is adapted to selectively remove the first material, leaving the second material substantially intact. After exposing the semiconductor structure to the etchant, it is detected whether the feature has been affected by the etchant.


