Diffusion Break Layout for Passive-Logic Backside Contact Integration

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Solution Overview

Problem

The challenge in semiconductor manufacturing is integrating passive devices with logic devices having backside contacts and backside power distribution networks, as existing methods require complete removal of the substrate, which is not compatible with the different substrate requirements of passive and logic devices.

Innovation Solution

A diffusion break is formed between the passive and logic device areas, extending into the substrate, with a hard mask covering the bottom surface and separating the doped silicon substrate from the backside interlevel dielectric layer, allowing for the co-integration of passive and logic devices with backside contacts and power rails.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the substrate is completely removed to form backside contacts for logic devices, then device density is enhanced, but passive devices cannot be formed adjacent to logic devices since they require the substrate

Engineering Contradiction:
Improvedevice densityVSAvoidcompatibility with passive devices
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The substrate is segmented into two distinct regions: a first substrate region retained under the passive device area and a second substrate region removed under the logic device area. This segmentation allows each region to serve its specific function - the first region supports passive devices while the second region enables backside contacts for logic devices, thereby resolving the contradiction between enhancing device density and maintaining compatibility with passive devices.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different substrate conditions are applied locally to different areas: the first substrate region is maintained with specific properties to support passive devices, while the second substrate region is completely removed to enable backside contacts. This local differentiation allows the structure to simultaneously satisfy the conflicting requirements of passive devices and logic devices in different spatial locations.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If passive devices and logic devices are co-integrated, then device functionality is enhanced, but different substrate requirements create manufacturing challenges

Engineering Contradiction:
Improvedevice functionalityVSAvoidmanufacturing process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The manufacturing process complexity is managed through segmentation of the substrate treatment into distinct regions. The first substrate region is processed to support passive devices while the second substrate region is processed to enable backside contacts. This regional segmentation allows standard manufacturing processes to be applied to each region independently, reducing overall process complexity while enabling co-integration of different device types with enhanced functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A diffusion break structure acts as an intermediary element between the passive device area and logic device area. This diffusion break, formed by extending into the first substrate region, serves as a mediator that allows both device types to coexist by creating appropriate electrical isolation and structural separation, thereby facilitating co-integration while managing the complexity of different substrate requirements.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12550351B2Diffusion break between passive device and logic device with backside contact
Publication Date: 2026.02.10 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US12550351B2 patent drawing
  • US12550351B2 patent drawing
  • US12550351B2 patent drawing

AI summary

Embodiments of present invention provide a method of forming a semiconductor structure. The method includes forming a passive device area and a logic device area on a substrate; forming a diffusion break between the passive device area and the logic device area, wherein the diffusion break extends into the substrate; removing a portion of the substrate to expose a bottom portion of the diffusion break; covering a first portion of the substrate underneath the passive device area and the bottom portion of the diffusion break with a hard mask; selectively removing a second portion of the substrate to expose at least a portion of a bottom surface of the logic device area; and depositing a backside interlevel dielectric (BILD) layer to cover the portion of the bottom surface of the logic device area. The semiconductor structure formed thereby is also provided.