Single Diffusion Break Stress Fill for Void-Free Semiconductor Channels
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Solution Overview
Problem
Conventional methods for incorporating stress in semiconductor devices face challenges in achieving consistent stress levels, particularly in multi-channel semiconducting nanostructures, leading to unfavorable hole and electron mobility, and often require compromising on material properties to meet stress requirements.
Innovation Solution
The use of self-aligned single diffusion breaks with a thin dielectric stressor film filled with a void-free metal provides consistently stressed channels, transmitting stress to the channel region without additional processing, and utilizing a combination of a dielectric liner and stressed metal fill to avoid voids and seams, allowing for improved hole and electron mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stress or pressure
If conventional methods are used to incorporate stress in semiconductor devices, then stress requirements may be met, but material properties must be compromised and hole and electron mobility are unfavorable
Solution Approach 1:
The stress incorporation is segmented into discrete self-aligned single diffusion breaks (SADBs) rather than requiring bulk material property changes. Each SADB acts as an independent stress source, allowing localized stress application without compromising overall material properties.
Solution Approach 2:
A dielectric liner is introduced as an intermediary between the metal fill and the semiconductor channel. This dielectric layer transmits stress from the metal fill to the channel region while preventing direct contact that would compromise material purity and properties.
2Stress or pressure
If conventional stress incorporation methods are used, then some stress may be achieved, but consistent stress distribution throughout the channel region is not achieved
Solution Approach 1:
Multiple SADBs are distributed along the channel length, with each break contributing to the overall stress distribution. This segmentation allows precise control over where stress is applied, achieving consistent stress throughout the channel region.
Solution Approach 2:
The stress parameters (metal fill stress magnitude, dielectric liner thickness, SADB spacing) are optimized to achieve consistent stress distribution. By adjusting these parameters, uniform stress of greater than 250 MPa is achieved throughout the channel region.
3Stress or pressure
If void-free metal fill is achieved through additional processing, then stress consistency improves, but device complexity and processing steps increase
Solution Approach 1:
The dielectric liner is deposited beforehand to line the SADB structure before metal fill is introduced. This preliminary action prevents void formation during subsequent metal deposition, eliminating the need for additional void-removal processing steps.
Solution Approach 2:
The dielectric liner serves multiple functions: it prevents void formation during metal fill, transmits stress to the channel, and provides structural support. This self-service approach eliminates the need for separate processing steps to address each issue independently.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach achieves consistent stress distribution throughout the channel region, enhancing hole and electron mobility, and increasing drive current without constraining material choices or compromising device performance.
Implementation Method 1
The self-aligned single diffusion break also contains a dielectric liner and a stressed metal fill, where the stressed metal fill exhibits a compressive stress of greater than or about 350 MPa. The channel region has a compressive stress of greater than or about 250 MPa.
Implementation Method 2
the stressed metal fill and the dielectric liner occupy about 95 vol. % or more of the volume. In embodiments, the stressed metal fill and the dielectric liner occupy about 99 vol. % or more of the self-aligned diffusion break volume.
Data Source
AI summary
The present technology includes semiconductor devices with improved stress in a channel region. The semiconductor device includes a substrate, a source region, a drain region, a channel region that includes at least one channel located between the source and the drain, a first gate region, and a second gate region. The first gate region includes a self-aligned single diffusion break, and the second gate region includes a first gate enclosing the channel between the source region and the drain region. The self-aligned single diffusion break also contains a dielectric liner and a stressed metal fill, where the stressed metal fill exhibits a stress of about 350 MPa or greater.