Diffusion-Couple Graphene Synthesis for Low-Temperature Wafer Throughput
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Solution Overview
Problem
Existing methods for synthesizing high-quality graphene on large-scale substrates at low temperatures are limited by the need for uniform application of temperature and pressure across the substrate surface, which is crucial for integration into mainstream electronics without damaging underlying devices, and current equipment lacks the necessary scalability and thermal compatibility.
Innovation Solution
A diffusion-couple synthesis method using a graphene synthesis tool that applies pressure and temperature simultaneously to a substrate load, comprising a carbon source and sacrificial diffusion layers, allowing graphene formation at controlled interfaces while maintaining a thermal budget below 500°C, utilizing existing commercial tools like wafer bonding tools and hot-press systems with modifications for uniform heat and pressure distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If uniform temperature and pressure are applied across large substrates, then graphene synthesis quality is improved, but equipment complexity and scalability are worsened
Solution Approach 1:
The patent adapts existing commercial equipment (wafer bonding tools, hot-press systems) for dual purposes: their original functions plus graphene synthesis. This multi-functionality approach allows uniform temperature and pressure application without requiring entirely new specialized equipment, thereby maintaining synthesis quality while reducing overall system complexity and enabling scalability.
Solution Approach 2:
The patent utilizes the inherent heating and pressing capabilities of existing commercial tools to perform graphene synthesis. By leveraging the self-service features of equipment already designed for uniform thermal and mechanical processing, the method avoids the need for additional complex specialized apparatus while achieving high-quality graphene production on large substrates.
2Adaptability or versatility
If low temperature synthesis is used, then CMOS compatibility is improved, but synthesis throughput is worsened
Solution Approach 1:
The patent systematically optimizes synthesis parameters including temperature, pressure, and time to achieve high-quality graphene at low temperatures (below 500°C) that are CMOS-compatible. By carefully adjusting these parameters, the method maintains thermal budget constraints while improving synthesis efficiency and throughput through optimized processing conditions.
Solution Approach 2:
The patent employs pre-synthesized carbon source layers deposited on sacrificial diffusion barriers before the actual graphene formation step. This preliminary preparation allows the synthesis process to proceed more efficiently at low temperatures, as the carbon source is already in position and ready for diffusion, thereby improving throughput without compromising CMOS compatibility.
3Ease of manufacture
If existing commercial tools are used, then equipment cost is reduced, but processing throughput is worsened
Solution Approach 1:
The patent enables existing commercial tools to perform multiple functions including their original purposes and graphene synthesis. This approach eliminates the need for dedicated specialized equipment, significantly reducing capital investment while achieving high throughput by utilizing the full capability of existing tools for both their native functions and graphene production.
Solution Approach 2:
The patent employs sacrificial diffusion barrier layers that are consumed during the graphene synthesis process. These sacrificial layers are discarded after serving their purpose of enabling carbon diffusion, allowing the use of simple, cost-effective existing equipment without requiring complex reusable specialized apparatus, thereby reducing equipment costs while maintaining high throughput.
4Area of stationary object
If large substrate area is processed, then scalability is improved, but uniformity of temperature and pressure application is worsened
Solution Approach 1:
The patent processes large substrates by dividing them into multiple regions or layers, with carbon source layers and sacrificial barriers applied across the entire substrate area. This segmentation approach allows uniform temperature and pressure application across large areas by treating different regions independently while maintaining overall consistency, thereby achieving both scalability and uniformity.
Solution Approach 2:
The patent utilizes existing commercial equipment designed for processing large wafers in wafer fabrication, which already incorporate mechanisms for uniform temperature and pressure distribution across large substrate areas. By adapting these proven tools for graphene synthesis, the method achieves both large substrate processing capability and uniformity without requiring new specialized equipment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables high-throughput, low-temperature synthesis of graphene on large substrates, ensuring uniformity and compatibility with CMOS technology, thereby enhancing the scalability and integration of graphene in semiconductor devices and other applications.
Implementation Method 1
Solid-phase diffusion of atoms in a 'material stack' forming a 'diffusion-couple' can be leveraged to synthesize high-quality thin-films
Implementation Method 2
applying pressure and temperature simultaneously to a substrate load... maintaining a thermal budget below 500°C
Implementation Method 3
applying pressure and temperature simultaneously to a substrate load... mechanisms to apply relatively large and uniform mechanical pressures
Data Source
AI summary
A diffusion-couple synthesis method using a graphene synthesis tool (GST) including: providing a substrate-load (SL) which includes first-prepared substrate (fPS) and second-prepared-substrate (sPS), where fPS includes a first-carbon-source (fCS), a first-sacrificial-diffusion layer (fSDL), and a first-device-level (fDL), where a first-dielectric-layer (fDiLy) is disposed atop fDL, where fSDL is disposed directly atop fDiLy, where fCS is disposed directly atop the fSDL, and where the sPS includes a secondCS, a secondSDL, and a secondDL, where secondDL is disposed atop the secondDL, where the secondSDL is disposed atop secondDiLy, where secondCS is disposed atop secondSDL; providing a GST capable of applying pressure and temperature to SL within a process chamber (PC); placing SL within PC; applying the pressure and the temperature to SL, where sPS is inverted and disposed above fPS, where fCS is in direct contact with secondCS; forming graphene at a first interface between the fDiLy and the fSDL and at a second interface between secondDiLy and secondSDL.