Diffusion Stop Layer for 3D IC TSV Reliability

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Solution Overview

Problem

In the manufacturing of 3D integrated circuits, metal materials and dopant ions diffuse into MOSFETs during the grinding and bonding processes, leading to device failures due to the exposure of metal materials at the bottom of through-silicon vias.

Innovation Solution

A diffusion stop layer is introduced beneath the silicon-on-insulator (SOI) layer to prevent metal materials and ions from diffusing into the MOSFETs, comprising a nitride layer that prevents ion diffusion and a buried layer to prevent conductive material migration, thereby enhancing the reliability of the MOSFETs during wafer grinding and bonding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the bottom of the wafer is ground to expose the TSV filled with metal material for bonding, then the TSV can be connected to external circuits or second wafer, but metal materials and dopant ions diffuse into the MOSFET during grinding and bonding processes

Engineering Contradiction:
ImproveMOSFET reliabilityVSAvoidMetal ion diffusion into MOSFET
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A diffusion stop layer is introduced as an intermediary barrier between the TSV metal fill and the MOSFET. This layer prevents direct interaction between metal ions and the MOSFET channel during grinding and bonding processes, thereby blocking harmful diffusion while allowing the TSV to maintain its electrical connection function

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The wafer structure is segmented into distinct functional layers, with the diffusion stop layer creating a clear separation between the TSV region and the active MOSFET region. This segmentation allows independent optimization of each layer's properties and prevents cross-contamination during processing

Inventive Principle:
Principle #1Segmentation

2Reliability

If metal materials are filled into the TSV for electrical connection, then the TSV can conduct signals and power, but the exposed metal materials at the bottom of TSV will diffuse into MOSFET during grinding and bonding

Engineering Contradiction:
ImproveMOSFET performanceVSAvoidMetal ion contamination
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The diffusion stop layer serves as a protective intermediary that allows the TSV to maintain its metal fill for electrical connectivity while preventing the metal ions from migrating into the MOSFET during high-temperature bonding and grinding operations

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The diffusion stop layer is formed in advance before the grinding and bonding processes. This preliminary protective measure ensures that when the wafer is later ground and bonded, the metal ions are already blocked from entering the MOSFET, preventing contamination before it can occur

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The diffusion stop layer effectively blocks metal ion diffusion into the MOSFETs, improving their performance and reliability in 3D integrated circuits by preventing ion contamination during the grinding and bonding processes.

Implementation Method 1

metal materials or other dopants, for example metal ions such as iron and sodium, etc, exposed at the bottom of the TSV, will be diffused into the metal oxide semiconductor field effect transistor (MOSFET) in the wafer because of the grinding process

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS9064849B23D integrated circuit structure, semiconductor device and method of manufacturing same
Publication Date: 2015.06.23 INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD
  • US9064849B2 patent drawing
  • US9064849B2 patent drawing
  • US9064849B2 patent drawing

AI summary

The present invention discloses a semiconductor device. In one embodiment, the semiconductor device comprises a substrate, a diffusion stop layer formed on the substrate, an SOI layer formed on the diffusion stop layer, an MOSFET transistor formed on the SOI layer, and a TSV formed in a manner of penetrating through the substrate, the diffusion stop layer, the SOI layer, and a layer where the MOSFET transistor is located; and an interconnect structure connecting the MOSFET transistor and the TSV.