Digit-to-Time Conversion Circuit for Picosecond Signal Resolution
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Solution Overview
Problem
Current electronic systems, such as sensors and Integrated Circuits, face challenges in achieving high precision and stability for clock-signal periods due to limitations in resolution and control over jittering and phase noise, especially at nanosecond and picosecond scales, which hinders the increase in frequency and reduction of time period.
Innovation Solution
A signal generating electric circuit that uses a first and second digitally controlled oscillator sub-circuit to generate periodic output signals with unequal periods based on frequency control words and a reference time unit, incorporating a converting sub-circuit to filter high-frequency components and achieve precise time intervals, allowing for extremely high time precision and accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the clock-signal period is reduced to nanosecond or picosecond scale, then the frequency is increased and time resolution is improved, but the control over jittering and phase noise deteriorates and signal integrity cannot be ensured
Solution Approach 1:
The patent divides the frequency control into two separate components: an integer part (first frequency control word) and a fractional part (second frequency control word). The integer part controls the base frequency, while the fractional part provides fine-tuned adjustment. This segmentation allows precise time resolution through the fractional component without compromising signal integrity, as each component operates within its optimal control range.
Solution Approach 2:
The patent changes the frequency parameter dynamically by combining two frequency control words with different precisions. The system switches between or combines integer and fractional frequency adjustments to achieve the desired time resolution while maintaining signal stability. This parameter change approach enables operation at picosecond scales without sacrificing jitter and phase noise control.
2Measurement precision
If a single frequency control word is used, then the device complexity is reduced, but the time precision and resolution cannot satisfy practical application requirements
Solution Approach 1:
The frequency control is segmented into two distinct control words: one for integer frequency adjustment and another for fractional frequency adjustment. This segmentation enables high time precision by utilizing the fractional part for fine-tuning, while the integer part handles coarse frequency setting. The dual-control structure achieves picosecond-level precision without requiring an overly complex single-control mechanism.
Solution Approach 2:
The patent uses a fractional frequency control word that provides more precision than traditionally necessary, extending beyond standard integer frequency control. This excessive precision in the fractional component enables time resolution at the picosecond scale, meeting stringent application requirements while keeping the overall control structure manageable through modular design.
Data Source
AI summary
A signal generating electric circuit, a signal generating method, a digit-to-time converting electric circuit and a digit-to-time converting method. The signal generating electric circuit includes: a first generating electric circuit configured for, based on a first frequency control word and a reference time unit, generating a periodic first output signal; and a second generating electric circuit configured for, based on a second frequency control word and the reference time unit, generating a periodic second output signal. The first frequency control word includes a first integer part and a first fractional part, the second frequency control word includes a second integer part and a second fractional part, the first integer part is equal to the second integer part, the first fractional part and the second fractional part are not equal, and a period of the first output signal and a period of the second output signal are not equal.