Digit-to-Time Conversion Circuit for Picosecond Pulse Timing
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Solution Overview
Problem
Current electronic systems face limitations in achieving high precision and stability for clock-signal periods, particularly in the order of nanoseconds, which are insufficient for advanced applications, and struggle to control jittering and phase noise at smaller time scales, hindering the increase in frequency and reduction of time periods.
Innovation Solution
A signal generating electric circuit and method that utilize a first and second digitally controlled oscillator sub-circuit to generate periodic output signals with unequal periods, based on frequency control words with integer and fractional parts, employing a reference time unit and phase-locked loop circuits to achieve high time precision and stability, allowing for extremely small periodic inequalities in the order of picoseconds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the clock-signal period is reduced to nanoseconds to increase frequency, then the productivity and speed of electronic systems are improved, but the measurement precision and control stability deteriorate due to increased jittering and phase noise
Solution Approach 1:
The frequency control word is segmented into integer part and fractional part. The integer part controls the basic clock frequency while the fractional part provides fine adjustment. This segmentation allows the system to achieve high frequency (nanosecond period) while maintaining precision through the fractional component's contribution to time resolution.
Solution Approach 2:
The system changes the parameter of frequency control by introducing a fractional part to the frequency control word. This parameter change enables continuous frequency adjustment rather than discrete steps, thereby achieving both high frequency operation and fine time resolution precision simultaneously.
2Measurement precision
If the time period is reduced to picoseconds to achieve higher precision, then the measurement precision is improved, but the stability deteriorates due to difficulty in controlling jittering and phase noise
Solution Approach 1:
The phase-locked loop circuit provides feedback control to maintain signal stability. The fractional frequency control word allows the feedback mechanism to operate effectively at picosecond time scales by providing fine-grained control over the oscillation frequency, thereby reducing jittering and phase noise while maintaining high precision.
Solution Approach 2:
The fractional frequency control word acts as an intermediary between the integer frequency control and the actual oscillation frequency. This intermediary enables smooth transitions and fine control at picosecond time scales without directly manipulating the raw frequency, thereby maintaining signal stability while achieving high precision.
3Device complexity
If a single oscillator circuit is used to generate clock signals, then the device complexity is reduced, but the manufacturing precision deteriorates due to inability to achieve sufficient time resolution
Solution Approach 1:
The single oscillator circuit is made multi-functional through the fractional frequency control mechanism. By processing both integer and fractional parts of the frequency control word within the same oscillator, the system achieves high time resolution precision without requiring multiple separate circuits, thereby maintaining simplicity while improving manufacturing precision.
Data Source
AI summary
A signal generating electric circuit, a signal generating method, a digit-to-time converting electric circuit and a digit-to-time converting method. The signal generating electric circuit includes: a first generating electric circuit configured for, based on a first frequency control word and a reference time unit, generating a periodic first output signal; and a second generating electric circuit configured for, based on a second frequency control word and the reference time unit, generating a periodic second output signal. The first frequency control word includes a first integer part and a first fractional part, the second frequency control word includes a second integer part and a second fractional part, the first integer part is equal to the second integer part, the first fractional part is not zero, the second fractional part is zero, and a period of the first output signal and a period of the second output signal are not equal.