Digital Accessory Interface Calibration for Audio Systems

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Solution Overview

Problem

In bidirectional wired communications links, establishing accurate synchronization between devices is challenging due to round-trip transmission delays, which complicates the recovery of clock and data signals from a combined data stream, especially when using a single wire or wire pair.

Innovation Solution

A method involving a master and slave device connected by a wired link with at least two wires, where a master clock signal is transmitted on one wire, and a synchronization data pattern with signal level transitions based on a delay value is sent on the other wire, allowing for the determination and adjustment of timing delay control data to compensate for round-trip transmission delays.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If timing information is embedded in data transmitted on a bidirectional link with a single wire, then synchronization can be achieved, but extra circuitry and system design complications are introduced due to the need to recover clock and data from a combined data stream

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidcircuitry complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent divides the timing and data transmission into separate wires: one wire carries the master clock signal for timing reference, while another wire carries the synchronization data pattern. This segmentation allows the receiving device to separately process timing information and data information, eliminating the complexity of recovering both from a combined stream while maintaining synchronization accuracy.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If separate wires are used for clock and data transmission, then circuit complexity is reduced, but the system requires at least two wires instead of a single wire solution

Engineering Contradiction:
Improvecircuitry simplicityVSAvoidnumber of wires
Core Design Contradiction:
Device complexityVSQuantity of substance

Solution Approach 1:

The patent utilizes the existing wired connection infrastructure with at least two wires, allowing each wire to serve multiple functions. The first wire carries both clock signal and can carry data in certain modes, while the second wire carries both data and acknowledgment signals. This multi-functionality approach reduces circuit complexity while utilizing the available wire infrastructure efficiently.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10042796B2Digital accessory interface calibration
Publication Date: 2018.08.07 CIRRUS LOGIC INC
  • US10042796B2 patent drawing
  • US10042796B2 patent drawing
  • US10042796B2 patent drawing

AI summary

An audio system comprises a master device; a slave device; and a wired connection, suitable for connecting the master device and the slave device, and having at least two wires. In order to compensate for a round-trip transmission delay, a method comprises: transmitting a master clock signal on a first wire of the two wires, from said master device to said slave device; transmitting a synchronisation data pattern on a second wire of the two wires, from said slave device to said master device, wherein said synchronisation data pattern comprises signal level transitions at timings that are set based on a delay value stored in said slave device; in said master device, determining timings of said signal level transitions as received at said master device; transmitting, on the second wire, from said master device to said slave device, timing delay control data based on said determination; and in said slave device, receiving said timing delay control data; and updating said stored delay value based on said timing delay control data.