Digital Adaptive ON-Time Generation for Buck Converters
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Solution Overview
Problem
Typical buck converters face efficiency decreases with increasing switching frequency due to higher switching loss, lower maximum conversion ratio, higher dropout voltage, and decreased current limit accuracy, along with limitations in generating short ON-times and stability issues in analog adaptive ON-time generation architectures.
Innovation Solution
A digital adaptive ON-time generation system that synchronizes the switching of power converters with a reference clock using a fully-digital phase locked loop, minimizing ON-time jitter and achieving stable operation by employing asynchronous pulse generators and digital filters to adjust ON-times with low latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If switching frequency is increased, then productivity is improved, but switching loss increases and efficiency decreases
Solution Approach 1:
The patent replaces the traditional analog ON-time generation circuit with a fully digital implementation. The digital system uses a reference clock signal and digital counting mechanisms to generate ON-time periods, eliminating the need for analog timing circuits. This substitution enables precise control of switch ON-times even at high switching frequencies, thereby improving efficiency while maintaining high productivity.
Solution Approach 2:
The patent changes the operational parameters by using a digital counter to count clock cycles and generate ON-time periods. By adjusting the count value parameter, the system can precisely control the ON-time duration. This parameter-based control allows the system to optimize switching frequency and ON-time independently, resolving the contradiction between high switching frequency and low switching loss.
2Ease of operation
If analog adaptive ON-time generation is used, then ON-time control is simplified, but ON-time jitter increases and stability deteriorates
Solution Approach 1:
The patent substitutes the analog adaptive ON-time generation circuit with a fully digital system. The digital implementation uses a reference clock and digital counters to generate ON-time periods, eliminating the jitter and stability issues inherent in analog circuits. The digital system maintains ease of operation through programmable control while achieving superior stability and zero jitter.
3Measurement precision
If digital ON-time generation is implemented, then ON-time precision is improved, but device complexity increases
Solution Approach 1:
The patent segments the ON-time generation function into distinct digital components: a reference clock source, a digital counter, and control logic. This segmentation allows each component to be optimized independently while working together to achieve precise ON-time control. The modular digital architecture reduces overall complexity compared to trying to implement precision timing in a single analog circuit.
4Productivity
If higher switching frequencies are used, then productivity increases, but current limit accuracy decreases
Solution Approach 1:
The patent replaces analog current sensing and limiting circuits with digital implementations. The digital system uses precise timing based on reference clock cycles to enforce current limits, achieving high accuracy even at elevated switching frequencies. This digital approach decouples current limit accuracy from switching frequency, allowing both to be optimized simultaneously.
Data Source
AI summary
To improve power converter ON-time generation, an example apparatus includes: a phase frequency detector to determine a phase difference between a first signal and a second signal; a first pulse generator to generate a first time signal at a second time, in which the first signal is associated with a first time delay based on the phase difference; and a second pulse generator coupled to the first pulse generator. The second pulse generator is configured to: generate a second time signal at a third time, in which the third time is after the second time; and obtain a digital word based on the phase difference at a first time, in which the first time is before the second time and the third time, and the second time signal is associated with a second time delay based on the phase difference.