Digital ANC Down-Sampling to Cut Group Delay and Power

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Solution Overview

Problem

Digital noise-cancellation systems face challenges in reducing time delay and power consumption due to high group delay in commercially available low-cost, low-noise ADC and DAC components, which are essential for effective ambient noise reduction in battery-powered devices.

Innovation Solution

The solution involves configuring a down-sampler associated with the sigma-delta analogue-to-digital converter to incorporate filter characteristics, and modifying subsequent digital filtering to compensate for this, thereby reducing sample-rate without introducing significant time delay, resulting in lower power consumption and cost-effective noise reduction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If high performance ADC and DAC components are used to decrease time delay, then time delay is reduced, but cost and power consumption increase significantly

Engineering Contradiction:
Improvetime delayVSAvoidpower consumption
Core Design Contradiction:
Loss of timeVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by performing filtering operations before down-sampling in the ADC signal path. By pre-filtering the high-rate digital signal at the ADC output, the system prepares the signal in advance for down-sampling, enabling the use of lower performance (lower power consumption) ADC and DAC components while maintaining acceptable time delay characteristics. The pre-filtering compensates for the delay introduced by down-sampling, allowing cost-effective components to achieve the required performance.

Inventive Principle:
Principle #10Preliminary action

2Loss of time

If high performance ADC and DAC components are used to decrease time delay, then time delay is reduced, but cost increases

Engineering Contradiction:
Improvetime delayVSAvoidcost
Core Design Contradiction:
Loss of timeVSEase of manufacture

Solution Approach 1:

The patent applies preliminary action by performing filtering operations before down-sampling in the ADC signal path. By pre-filtering the high-rate digital signal at the ADC output, the system prepares the signal in advance for down-sampling, enabling the use of lower performance (lower cost) ADC and DAC components while maintaining acceptable time delay characteristics. The pre-filtering compensates for the delay introduced by down-sampling, allowing cost-effective components to achieve the required performance.

Inventive Principle:
Principle #10Preliminary action

3Use of energy by moving object

If down-sampling is applied to reduce power consumption, then power consumption is reduced, but time delay increases

Engineering Contradiction:
Improvepower consumptionVSAvoidtime delay
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing filtering operations before down-sampling in the ADC signal path. By pre-filtering the high-rate digital signal at the ADC output, the system prepares the signal in advance for down-sampling, enabling the use of lower performance (lower power consumption) ADC and DAC components while maintaining acceptable time delay characteristics. The pre-filtering compensates for the delay introduced by down-sampling, allowing cost-effective components to achieve the required performance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies feedback by using the output of the down-sampled digital filter to adjust and compensate for the time delay introduced by the down-sampling operation. The system measures or estimates the delay caused by down-sampling and uses feedback control to adjust the filtering characteristics, ensuring that the overall time delay remains within acceptable limits while still benefiting from the power consumption reduction achieved through down-sampling.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9031251B2Digital noise-cancellation
Publication Date: 2015.05.12 SAMSUNG ELECTRONICS CO LTD
  • US9031251B2 patent drawing
  • US9031251B2 patent drawing
  • US9031251B2 patent drawing

AI summary

This invention relates to a device for and method of implementing an ambient noise-cancellation (ANC) circuit that uses digital processing whereby a signal indicative of the ambient noise is converted to digital form, filtered, using a fixed or adaptive digital filter, and then converted back to analog before sending it to an ear-proximate speaker. In order to address the time delays associated with such processing operations, the analog-to-digital converter used is associated with a down-sampler, and the arrangement is such that a first part of the filtering is implemented by the down-sampler, and a second part of the filtering is implemented by the digital filter. This reduces group delay by configuring a down-sampler associated with the front end of the analog-to-digital converter to incorporate selected filter characteristics of the overall ANC filter response, and modifying the subsequent filtering processing stage to compensate for this.