Digital Arithmetic Circuit Timing for Stable A/D Conversion
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Solution Overview
Problem
Existing physical quantity detection circuits face accuracy issues due to sudden changes in power consumption during the start and end of digital signal processing, leading to fluctuations in output voltage from the regulator circuit, which affect the accuracy of A/D conversion.
Innovation Solution
The digital arithmetic circuit is configured to perform arithmetic processing start and end operations outside the analog/digital conversion period, ensuring that these operations do not coincide with the analog/differentiation conversion period, thereby maintaining a stable power supply for the analog/digital conversion circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the digital arithmetic circuit performs arithmetic processing start and end operations during the analog/digital conversion period, then the processing speed and responsiveness are improved, but the accuracy of A/D conversion deteriorates due to power supply voltage changes
Solution Approach 1:
The patent segments the operating period into distinct phases: an analog/digital conversion period and an arithmetic processing period. During the analog/digital conversion period, the digital arithmetic circuit is configured to perform no operations, thereby isolating the A/D conversion process from power consumption fluctuations caused by arithmetic start/end operations. This temporal segmentation resolves the contradiction by preventing interference between the two processes while maintaining both conversion accuracy and processing functionality.
Solution Approach 2:
The patent implements preliminary action by scheduling arithmetic processing start and end operations to occur only during the arithmetic processing period, before the analog/digital conversion period begins. This advance planning ensures that power supply voltage stabilizes before conversion starts, preventing accuracy degradation while still allowing timely processing of converted data.
2Productivity
If the digital arithmetic circuit performs frequent start and end operations, then the processing capability is improved, but the stability of power supply voltage deteriorates
Solution Approach 1:
The patent divides the operational timeline into distinct segments where arithmetic processing operations are confined to specific periods. By segmenting when start/end operations can occur (only during arithmetic processing period, not during A/D conversion period), the system maintains power supply stability while preserving processing capability through structured operation scheduling.
Solution Approach 2:
The patent implements periodic action by establishing a cyclic pattern where the digital arithmetic circuit alternates between an analog/digital conversion period (with no operations) and an arithmetic processing period (where operations are allowed). This periodic structure regularizes power consumption patterns, stabilizing the power supply voltage while maintaining continuous processing capability over time.
3Device complexity
If the digital arithmetic circuit is allowed to operate freely during A/D conversion, then the device complexity is reduced, but the reliability of conversion accuracy deteriorates
Solution Approach 1:
The patent applies dynamics by making the operational state of the digital arithmetic circuit time-dependent. The circuit dynamically adjusts its behavior based on the current period: remaining inactive during A/D conversion period and becoming active during arithmetic processing period. This dynamic control ensures conversion accuracy reliability while maintaining relatively simple device architecture through automated period-based state transitions.
Data Source
AI summary
A physical quantity detection circuit includes: an analog/digital conversion circuit performing analog/digital conversion processing on an analog signal based on an output signal from a physical quantity detection element and outputting a first digital signal; a digital arithmetic circuit having the first digital signal inputted thereto, performing arithmetic processing on the first digital signal, and outputting a second digital signal; and a regulator circuit supplying a power-supply voltage to the analog/digital conversion circuit and the digital arithmetic circuit. The digital arithmetic circuit does not perform an arithmetic processing start operation to start the arithmetic processing and an arithmetic processing end operation to end the arithmetic processing, during an analog/digital conversion period when the analog/digital conversion is performed.