Digital Buck-Boost Converter EMI Reduction via Adaptive PWM

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Solution Overview

Problem

Conventional buck-boost conversion circuits operate in analog mode, occupying large chip area, consuming high current, and causing electromagnetic interference (EMI) and ripple components in output voltages, necessitating improvements in efficiency and interference reduction.

Innovation Solution

A digital buck-boost conversion circuit incorporating an analog-to-digital converter, pulse period control block, pulse generation block, and buck-boost converter, which converts output voltage signals into digital signals, measures voltage levels at different frequencies, calculates degrees of scattering, and generates pulse period control signals to control pulse periods and duty cycles, thereby reducing excessive frequency components and ripple components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If conventional analog mode is used for buck-boost conversion control, then the control circuit can operate continuously, but the chip area occupied is large and current consumption is high

Engineering Contradiction:
Improvecontinuous control operationVSAvoidchip area
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The patent replaces the analog control system with a digital control system. The digital controller uses discrete digital signals to control the buck-boost converter, substituting the continuous analog circuitry with digital logic and processing elements. This substitution significantly reduces the chip area required while maintaining control functionality through digital pulse width modulation (PWM) generation based on sampled voltage feedback.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Ease of operation

If conventional analog mode is used for buck-boost conversion control, then the control circuit can operate continuously, but current consumption is high

Engineering Contradiction:
Improvecontinuous control operationVSAvoidcurrent consumption
Core Design Contradiction:
Ease of operationVSUse of energy by moving object

Solution Approach 1:

The digital control architecture replaces power-hungry analog operational amplifiers and continuous comparison circuits with low-power digital logic elements. The system samples the output voltage periodically and processes the digital representation, consuming significantly less current while achieving the same voltage regulation objective through discrete control updates.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Object-affected harmful factors

If PWM frequency is increased to remove EMI and ripple components, then EMI and ripple may be reduced, but power loss increases and conversion efficiency decreases

Engineering Contradiction:
ImproveEMI and ripple componentsVSAvoidpower loss
Core Design Contradiction:
Object-affected harmful factorsVSLoss of energy

Solution Approach 1:

The patent implements dynamic frequency adjustment of the PWM signal based on real-time operating conditions. The digital controller monitors the output voltage and adjusts the PWM frequency adaptively - using higher frequencies when needed to suppress ripple and EMI, and lower frequencies when possible to minimize switching losses. This dynamic approach optimizes the trade-off between EMI/ripple suppression and power efficiency.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9124172B2Digital buck-boost conversion circuit and method of operating the same
Publication Date: 2015.09.01 SAMSUNG ELECTRONICS CO LTD
  • US9124172B2 patent drawing
  • US9124172B2 patent drawing
  • US9124172B2 patent drawing

AI summary

A digital buck-boost conversion circuit includes an analog-to-digital converter configured to convert an output voltage signal into a digital signal, a pulse period control block configured to output a pulse period control signal based on degrees of scattering at different frequencies of the digital signal, a pulse generation block configured to output a pulse based on the pulse period control signal, and a buck-boost converter configured to convert the pulse into the output voltage signal.