Digital Capacitance Calibration for Stable Filter Cutoff Frequency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional radio signal processing circuits in semiconductor chips face challenges in incorporating filters like SAW or dielectric filters, leading to manufacturing variations and signal quality deterioration due to cutoff frequency shifts, which affect suppression of undesired signals and signal-to-noise ratio.
Innovation Solution
An automatic cutoff frequency adjusting circuit using a voltage/current converter, charge/discharge circuits, digital capacitance, comparator, and capacitance control circuit to adjust the filter cutoff frequency to arbitrary settings, incorporating a switch and reset signal for parallel coupling of electrostatic capacitances, allowing precise calibration and adjustment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If SAW filter or dielectric filter is used to suppress undesired band signals, then signal quality is improved, but the filter cannot be incorporated into the semiconductor chip, increasing component count and mounting area
Solution Approach 1:
The invention extracts the filtering function from external SAW/dielectric filters and implements it within the semiconductor chip using an active RC filter circuit. The channel filter circuit (107) is incorporated into the semiconductor chip, eliminating the need for external filters while maintaining signal quality through automated cutoff frequency adjustment.
Solution Approach 2:
The invention replaces the mechanical/physical filter structures (SAW filters, dielectric filters) with an electronic active RC filter circuit that can be integrated into the semiconductor chip. This substitution enables filter functionality to be achieved through electronic components rather than mechanical wave structures.
2Ease of manufacture
If channel filter is incorporated into semiconductor chip using active RC filter, then device integration is improved, but cutoff frequency shifts due to manufacturing variations and temperature, deteriorating signal quality
Solution Approach 1:
The invention performs preliminary calibration of the cutoff frequency by automatically adjusting the capacitance value before normal operation. The automatic cutoff frequency adjusting circuit (412) measures the actual cutoff frequency and adjusts the digital capacitance (151) to compensate for manufacturing variations and temperature effects, ensuring accurate filtering performance.
Solution Approach 2:
The invention implements a feedback mechanism where the automatic cutoff frequency adjusting circuit continuously monitors the cutoff frequency of the channel filter and adjusts the digital capacitance accordingly. The adjusting circuit measures the cutoff frequency and modifies the capacitance value to maintain the desired filtering characteristics despite environmental variations.
3Manufacturing precision
If manual calibration of filter cutoff frequency is performed, then manufacturing precision is improved, but adjustment time increases and productivity decreases
Solution Approach 1:
The invention enables the channel filter to self-adjust its cutoff frequency automatically without requiring manual calibration. The automatic cutoff frequency adjusting circuit (412) performs the adjustment autonomously by measuring the actual cutoff frequency and modifying the digital capacitance (151) accordingly, eliminating time-consuming manual calibration processes.
Solution Approach 2:
The invention dynamically changes the capacitance parameter of the channel filter to adjust the cutoff frequency. By varying the capacitance value of the digital capacitance (151) based on measured cutoff frequency deviations, the system automatically optimizes filtering performance without manual intervention.
Data Source
AI summary
The disclosed invention enables the cutoff frequency of a filter to be automatically adjusted to an arbitrary setting value within the adjustment range. An automatic cutoff frequency adjusting circuit includes a voltage/current converter circuit, a charge circuit, a discharge circuit, a digital capacitance having a plurality of electrostatic capacitances, a comparator for comparing a voltage inputted to the digital capacitance with a reference voltage, and a capacitance control circuit for controlling the digital capacitance. The time until the comparator detects that the voltage inputted to the digital capacitance is higher than the reference voltage after a reset signal has become a predetermined logic level is measured, and the digital capacitance is controlled by repeating, under a predetermined condition, processing for obtaining a next setting value of the digital capacitance, based on a measurement result, a target value of the digital capacitance, and the current value of the digital capacitance.