Digital Cartesian Transmitter Using Pi/4 Phase Offset LO Signals
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Solution Overview
Problem
Conventional RF transmitters face power efficiency degradation and reduced bandwidth due to high power consumption and silicon area constraints, especially in digitized integrated circuits, where analog circuitry is difficult to scale down and struggles with accommodating higher bandwidth waveforms.
Innovation Solution
A digital Cartesian transmitter architecture utilizing π/4 phase offset local oscillator signals with a vector decomposer and phase selector circuit to reduce duty cycle overlap and enhance power efficiency, implemented entirely in digitized circuitry to minimize analog components and improve bandwidth handling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional RF transmitter architectures are used, then power efficiency is maintained at acceptable levels, but bandwidth is reduced and power consumption increases
Solution Approach 1:
The patent changes the LO signal phase offset parameter from conventional values (0, π/2, π) to π/4, and uses multiple LO signals with different phase offsets (π/4, 3π/4, 5π/4, 7π/4) to achieve both high power efficiency and high bandwidth simultaneously. This parameter change enables the system to overcome the traditional trade-off between power efficiency and bandwidth.
2Use of energy by moving object
If analog circuitry is used in integrated circuits, then power efficiency can be maintained, but silicon area increases and scaling becomes difficult
Solution Approach 1:
The patent replaces analog circuitry with digital circuitry implementation. The vector decomposer, phase selector, and LO signal generation are all implemented using digital logic circuits, eliminating the need for complex analog components while maintaining power efficiency. This substitution reduces silicon area and enables easier scaling to smaller process nodes.
3Device complexity
If conventional LO signals are used, then device complexity is reduced, but duty cycle overlap increases reducing power efficiency
Solution Approach 1:
The patent segments the LO signal generation into multiple distinct phase-offset signals (π/4, 3π/4, 5π/4, 7π/4) that are selectively applied to different signal paths. The vector decomposer segments the modulation process into in-phase and quadrature components that can be independently processed. This segmentation eliminates duty cycle overlap while keeping each individual circuit block relatively simple.
Data Source
AI summary
A broadband digital transmitter is disclosed. The digital transmitter includes a vector decomposer circuit, a phase selector circuit, and a digital power amplifier (DPA). The vector decomposer circuit receives baseband in-phase (I) and quadrature (Q) signals and decomposes the baseband I and Q signals into an offset envelope signal and a non-offset envelope signal. The phase selector circuit receives a plurality of phase offset local oscillator (LO) signals and outputs, responsive to the baseband I and Q signals, offset LO signals and non-offset LO signals. The DPA processes the offset envelope signal, the non-offset envelope signal, the offset LO signals, and the non-offset LO signals to generate an output signal of the digital transmitter.