Digital CDR Feedback Loop for Precise Sampling Clock Phase
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Solution Overview
Problem
In data communication, accurately matching the symbol transmission rate of the transmitting side with the sampling rate of the receiving side is challenging, leading to difficulties in maintaining clock synchronization for accurate data recovery in CDR circuits.
Innovation Solution
A digital CDR circuit using quantization of signal magnitude and a feedback loop circuit, comprising a phase detector, charge pump, loop filter, and phase shift control code generator, along with a feedback loop including a CTLE&VGA circuit, analog-to-digital converter, deserializer, PLL, and phase shifter, to derive an optimal phase value for the sampling clock.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a digital CDR circuit is designed to accurately match symbol transmission rate with sampling rate, then clock synchronization accuracy is improved, but circuit complexity increases
Solution Approach 1:
The phase detector is divided into multiple phase detection units, each handling specific data signal combinations. This segmentation allows the circuit to process different signal scenarios independently, improving synchronization accuracy while keeping each unit's complexity manageable
Solution Approach 2:
A summator is introduced as an intermediary component that aggregates determination signals from multiple phase detection units. This mediator simplifies the overall circuit structure by centralizing the combination logic, reducing the complexity of inter-unit interactions while maintaining accurate phase detection
2Measurement precision
If multiple phase detection units are used to improve sampling time determination accuracy, then measurement precision is improved, but device complexity increases
Solution Approach 1:
Multiple phase detection units are merged through the summator component, which combines their determination signals into a unified output. This merging approach allows the system to leverage multiple detection perspectives for improved accuracy while avoiding the complexity of fully independent processing paths
Solution Approach 2:
Each phase detection unit is designed with universal functionality to handle different data signal combinations (first input data, second input data, third input data). This multi-functionality reduces the need for specialized units for each scenario, improving accuracy across diverse inputs while controlling overall complexity
Data Source
AI summary
Disclosed are a digital CDR circuit and a feedback loop circuit including the same. The digital CDR circuit includes a phase detector that receives an input signal and outputs a phase detection result signal corresponding to a determination result for a sampling time based on the input signal, a charge pump that receives the phase detection result signal and outputs an amplified signal obtained by multiplying the phase detection result signal by a gain, a loop filter that receives the amplified signal and filters the amplified signal to output a filtered signal, and a phase shift control code generator that generates a control signal for controlling a phase of a signal based on the filtered signal, and the input signal includes plural data signals and plural error signals, and the data signals and the error signals are digital signals which are quantized based on a signal magnitude.