Digital Clamp Circuit for IC State Retention

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Solution Overview

Problem

As process technologies scale, transistor leakage increases, leading to higher power consumption, and existing methods to reduce leakage power, such as using shadow latches, result in significant area overhead and complexity, especially when dealing with external IPs where modifications are not feasible.

Innovation Solution

A digital clamp is activated when a logic block enters sleep mode, adjusting the virtual power supply to a retention voltage level, allowing for quick boot-up with minimal area overhead by comparing a reference voltage to the virtual power supply and adjusting it to a retention voltage level, using a comparator, counter, and decoder to control the clamp.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If shadow latches are used for state retention, then quick boot-up is achieved, but area overhead and device complexity increase significantly

Engineering Contradiction:

Improveboot-up timeVSAvoidarea overhead

Core Design Contradiction:

Loss of timeVSArea of stationary object

Solution Approach 1:

The patent extracts only the essential function of state retention from the shadow latch structure. Instead of implementing full shadow latches for every sequential element, the invention uses a simplified clamp circuit that selectively retains states only when needed (during sleep mode), removing unnecessary structural overhead while maintaining the quick wake-up capability.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the operational parameters of the retention mechanism by using a clamp circuit controlled by sleep/wake signals. The clamp dynamically adjusts its behavior based on the power state, providing low impedance during sleep to retain states and high impedance during active operation, thereby achieving quick boot-up without permanent structural overhead.

Inventive Principle:

Principle #35Parameter changes

2Loss of time

If shadow latches are used for state retention, then quick boot-up is achieved, but device complexity increases

Engineering Contradiction:

Improveboot-up timeVSAvoidcomplexity

Core Design Contradiction:

Loss of timeVSDevice complexity

Solution Approach 1:

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The clamp circuit serves multiple functions: it acts as a state retention mechanism during sleep mode, a transparent conduit during active operation, and a power management element by being controlled by the sleep/wake signal. This multi-functionality reduces the need for separate dedicated retention structures, thereby reducing overall device complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Reliability

If all sequentials are retrofitted with shadow latches, then state retention is achieved, but area overhead increases significantly

Engineering Contradiction:

Improvestate retentionVSAvoidarea overhead

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent segments the state retention function from the sequential elements themselves. Instead of modifying every latch or flip-flop with shadow structures, the invention introduces a separate clamp circuit that operates on the supply line to the sequential elements. This segmentation allows state retention without duplicating storage structures for each sequential element, thereby reducing area overhead.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The clamp circuit acts as an intermediary between the power supply and the sequential elements during sleep mode. By controlling the supply voltage to a retention level through the clamp, the invention achieves state retention without direct modification of the sequential elements, avoiding the area overhead of shadow latches while maintaining reliability.

Inventive Principle:

Principle #24Intermediary (Mediator)

4Reliability

If separate supply lines are routed to shadow latches, then state retention is achieved, but device complexity and area overhead increase

Engineering Contradiction:

Improvestate retentionVSAvoidcomplexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the state retention function with the existing power supply infrastructure. Instead of creating separate supply lines for shadow latches, the invention uses the same supply line that already exists for the sequential elements, controlling it through a clamp circuit. This merging eliminates the need for additional routing infrastructure, reducing both area overhead and device complexity while maintaining state retention reliability.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS9484917B2Digital clamp for state retention

Publication Date: 2016.11.01 INTEL CORP

AI summary

Described is an apparatus which comprises: a clamp coupled between a first power supply and a second power supply; and a circuit to operate with the second power supply, wherein the clamp is operable to adjust the second power supply when the apparatus enters a low power mode.