Digital Clock Duty Cycle Correction Circuit

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Solution Overview

Problem

Conventional duty-cycle correction circuits face challenges in burst mode applications, requiring long settling periods and increased power consumption due to analog loop implementations, which are inefficient for maintaining a 50% duty cycle.

Innovation Solution

A digital domain feedback path is implemented in the duty cycle correction circuit, using a digital-to-analog converter for offset correction, allowing faster settling times and reduced power consumption by storing the digital-to-analog converter input value for quicker reactivation and turning off non-essential circuit components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an analog loop implementation is used for duty cycle correction, then the circuit can maintain a 50% duty cycle, but the settling period becomes long and power consumption increases in burst mode applications

Engineering Contradiction:

Improveduty cycle accuracyVSAvoidsettling period

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent replaces the analog loop implementation with a digital domain implementation for duty cycle correction. The digital circuit uses a charge pump and controller to measure duty cycle and generate correction signals, substituting continuous analog feedback with discrete digital processing. This substitution reduces settling time and power consumption while maintaining duty cycle accuracy.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If an analog loop implementation is used for duty cycle correction, then the circuit can maintain a 50% duty cycle, but power consumption increases in burst mode applications

Engineering Contradiction:

Improveduty cycle accuracyVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Productivity

If a digital domain feedback path is implemented with DAC offset correction, then settling time and power consumption are reduced, but circuit complexity increases

Engineering Contradiction:

Improvesettling speedVSAvoidcircuit complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces a digital-to-analog converter (DAC) with offset correction as an intermediary component in the digital domain feedback path. The DAC converts digital correction signals to analog signals while applying offset correction to eliminate systematic errors. This intermediary enables accurate duty cycle correction with faster settling and lower power consumption despite increased circuit complexity.

Inventive Principle:

Principle #24Intermediary (Mediator)

4Use of energy by stationary object

If analog filter components are reduced in size, then power consumption and circuit area are reduced, but filtering performance may deteriorate

Engineering Contradiction:

Improvepower consumptionVSAvoidfiltering performance

Core Design Contradiction:

Use of energy by stationary objectVSReliability

Solution Approach 1:

The patent replaces analog filtering with digital domain processing. The digital circuit implements duty cycle measurement and correction algorithms in the digital domain, eliminating or significantly reducing the need for analog filter components. This substitution maintains filtering performance while reducing power consumption and circuit area.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution reduces settling time and power consumption, enabling efficient duty cycle correction in burst mode applications while maintaining a 50% duty cycle with reduced analog filter component size.

Implementation Method 1

The controller is configured to compare charge accumulated from the first output to charge accumulated from the second output over a plurality of clock cycles

Methodology Applied

Scientific EffectCharge accumulation: Capacitance

Data Source

PatentUS10547297B2Digital clock duty cycle correction

Publication Date: 2020.01.28 TEXAS INSTRUMENTS INC

AI summary

A duty cycle correction circuit includes a charge pump and a controller. The charge pump includes a current source, a first output, and a second output. The charge pump routes current from the current source to the first output during a positive portion of a clock, and routes current from the current source to the second output during a negative portion of the clock. The controller compares charge accumulated from the first output to charge accumulated from the second output over a plurality of clock cycles to determine which of the positive portion of the clock and the negative portion of the clock is longer. The controller also generates a digital value that indicates an amount of adjustment to apply to a duty cycle of the clock based on which of the positive portion of the clock and the negative portion of the clock is longer.