Digital Control Power Supply Strobe Timing Adjustment

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Solution Overview

Problem

Digital control power supply circuits face challenges in achieving an adequate power supply rejection ratio (PSRR) due to fluctuations in input voltage, leading to instability in output voltage averaging and increased ripple, which cannot be effectively managed by existing control algorithms.

Innovation Solution

A digital control power supply circuit with a control circuit that includes an A/D converter, error detector, compensator, digital pulse width modulator, and strobe signal generator, which adjusts the sampling timing of the feedback voltage to stabilize the center of the output voltage ripple, thereby improving the PSRR by allowing arbitrary sampling on the slope of the output voltage ripple.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the A/D converter samples the feedback voltage at a fixed timing, then the control algorithm is simple, but the output voltage average level deviates from the target value due to ripple variations

Engineering Contradiction:
Improvecontrol algorithm complexityVSAvoidoutput voltage average level accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent applies dynamics by making the sampling timing variable rather than fixed. The A/D converter samples the feedback voltage at different timings depending on the duty ratio, with the sampling timing being dynamically adjusted based on the pulse signal duty ratio. This dynamic sampling timing allows the system to accurately capture the average output voltage level regardless of duty ratio changes, resolving the contradiction between simple control algorithms and accurate voltage measurement.

Inventive Principle:
Principle #15Dynamics

2Device complexity

If the sampling timing is fixed, then the circuit operation is simple, but the PSRR deteriorates due to increased output voltage ripple

Engineering Contradiction:
Improvecircuit operation complexityVSAvoidpower supply rejection ratio
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent implements dynamic sampling timing adjustment where the A/D converter samples the feedback voltage at timings that adapt to duty ratio changes. This dynamic approach maintains stable output voltage averaging across varying duty ratios, thereby improving PSRR without significantly complicating the circuit operation. The sampling timing is synchronized with the pulse signal duty ratio to optimize ripple rejection.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses feedback by continuously monitoring the output voltage through the feedback voltage and adjusting the sampling timing based on the duty ratio. This feedback mechanism ensures that the sampling occurs at the optimal moment to capture the true average voltage, compensating for ripple effects and improving PSRR while maintaining relatively simple circuit operation.

Inventive Principle:
Principle #23Feedback

3Adaptability or versatility

If the duty ratio changes due to input voltage fluctuations, then the power supply adapts to input changes, but the output voltage ripple increases and average level stability deteriorates

Engineering Contradiction:
Improveinput voltage adaptationVSAvoidoutput voltage average level stability
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The patent applies dynamics by dynamically adjusting the sampling timing in response to duty ratio changes caused by input voltage fluctuations. The A/D converter samples the feedback voltage at timings that correspond to the current duty ratio, ensuring that the sampled value accurately represents the average output voltage regardless of how much the duty ratio has changed. This maintains output voltage stability while preserving the system's adaptability to input variations.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the sampling timing parameter based on the duty ratio. When the duty ratio changes due to input voltage fluctuations, the sampling timing is adjusted proportionally to maintain accurate average voltage measurement. This parameter change approach allows the system to adapt to input voltage changes while maintaining output voltage stability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9634564B2Control circuit and control method of digital control power supply circuit, and digital control power supply circuit, electronic device and base station using the same
Publication Date: 2017.04.25 ROHM CO LTD
  • US9634564B2 patent drawing
  • US9634564B2 patent drawing
  • US9634564B2 patent drawing

AI summary

A control circuit of a digital control power supply circuit includes: an A/D converter that samples a feedback voltage according to an output voltage of the power supply circuit when a strobe signal is asserted, and converts the sampled feedback voltage into digital feedback data; an error detector that generates error data which indicates a difference between the feedback data and target data; a compensator that generates a duty command value which is adjusted to approximate the error data to zero; a digital pulse width modulator that receives the duty command value and generates a pulse signal having a duty ratio corresponding to the duty command value; and a strobe signal generator that generates the strobe signal and adjusts a sampling timing at which the strobe signal is asserted such that the sampling timing approximates a target position set in a substantial center of a slope of the output voltage.