Digital Correction Circuit Offset Compensation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Digital correction circuits face errors due to limited control resolution and comparison offset of comparators, leading to suboptimal calibration results and increased errors over repeated calibration processes.
Innovation Solution
A digital correction circuit and calculation code generation circuit that compare reference and control voltages in both non-inverted and inverted states, generating and storing calculation codes to correct for comparison performance and offset limitations, thereby optimizing calibration results.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a digital correction circuit uses a comparator for calibration, then calibration can be performed, but the control resolution is limited by the comparison performance causing errors
Solution Approach 1:
The patent applies inversion by comparing the control voltage in both non-inverted and inverted states. The comparator output is inverted in the second mode, allowing the circuit to detect comparison offsets and compensate for them through calculation, thereby achieving higher precision than the comparator's native resolution
Solution Approach 2:
The patent changes the operational parameters by switching between two comparison modes (non-inverted and inverted states). By performing calculations on the results from both modes, the system derives a control code that exceeds the original comparator resolution, effectively changing the precision parameter through computational processing
2Ease of operation
If a comparator is used for calibration, then comparison function is provided, but comparison offset causes errors in calibration results
Solution Approach 1:
The patent implements feedback by using the comparator output from both non-inverted and inverted modes to generate calculation codes. These codes are processed to compensate for comparison offsets, and the corrected control code is fed back to the calibration circuit, creating a closed-loop system that eliminates offset errors
Solution Approach 2:
The patent introduces asymmetry by performing calculations that treat the non-inverted and inverted comparison results differently. The calculation code generation circuit processes these asymmetric results to derive a corrected control code that compensates for the symmetric comparison offset, thereby eliminating the error
3Duration of action of stationary object
If calibration is repeatedly performed with limited resolution, then calibration process continues, but errors accumulate and increase
Solution Approach 1:
The patent applies preliminary action by pre-calculating compensation codes during the calibration process. The calculation code generation circuit computes corrected control codes that account for comparator limitations before final calibration application, preventing error accumulation from occurring in the first place rather than correcting it after repetition
Data Source
AI summary
A calculation code generation circuit performs calibration using a counter, and a digital correction circuit including the same. The calculation code generation circuit performs a calculation process according to first and second modes, the calculation process including generating a first code by sampling a first value of the count code, generating a second code by sampling a second value of the count code, generating first and second calculation codes using the first and second codes in the first and second modes, respectively, and generating, in a calibration disable state, a third calculation code using the first and second calculation codes generated in the first and second modes, respectively, to remove the influence of the comparison offset or comparison performance of a comparator, thereby removing a calibration error.