Digital Currency Computing System Parallel Bus Signal Routing

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Solution Overview

Problem

Existing computing systems for digital currency face challenges with signal transmission quality and efficiency due to excessive load on serial buses, leading to poor communication signal quality and low transmission rates, especially as the number of computing devices increases.

Innovation Solution

The proposed computing system employs a configuration where each computing device has two ports connected to a signal transmission path, allowing specific signals to be received and stored locally while non-specific signals are forwarded or bypassed, using communication modules with forwarding and bypass paths to improve signal quality and efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple computing devices are connected to a serial bus, then the system can expand computing capacity, but the signal transmission quality deteriorates and transmission rate decreases

Engineering Contradiction:
Improvecomputing capacityVSAvoidsignal transmission quality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent divides the serial bus into multiple independent parallel transmission paths, with each computing device connected to multiple buses. This segmentation allows signals to be transmitted through different paths simultaneously, reducing congestion and improving signal quality while maintaining system expandability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a single-dimensional serial bus architecture to a multi-dimensional parallel bus architecture. By adding temporal and spatial dimensions to signal transmission, the system can transmit multiple signals simultaneously through different paths, thereby improving transmission quality without limiting device expansion.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If computing devices are added to increase processing power, then productivity improves, but transmission delays increase

Engineering Contradiction:
Improveprocessing powerVSAvoidtransmission delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

By segmenting the transmission medium into multiple parallel buses, the patent enables simultaneous signal transmission across different paths. This reduces the queuing delay and transmission time for each individual signal, allowing the system to accommodate more computing devices without proportionally increasing transmission delay.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent ensures continuous and efficient signal transmission by providing multiple active transmission paths. Signals can be routed through different buses simultaneously, maintaining continuous progress in data transmission and reducing overall delay even as the number of computing devices increases.

Inventive Principle:
Principle #20Continuity of useful action

3Device complexity

If a serial bus is used to connect computing devices, then device complexity is reduced, but communication efficiency decreases

Engineering Contradiction:
Improveconnection structureVSAvoidcommunication efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent segments the communication system into multiple independent parallel buses, each capable of simultaneous signal transmission. This segmentation dramatically improves communication efficiency by allowing concurrent data transfer, while the modular nature of parallel buses keeps individual device complexity manageable through standardized connection interfaces.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12124402B2Computing device and computing system for digital currency
Publication Date: 2024.10.22 SHENZHEN MICROBT ELECTRONICS TECH CO LTD
  • US12124402B2 patent drawing
  • US12124402B2 patent drawing
  • US12124402B2 patent drawing

AI summary

A computing device and a computing system for digital currency are disclosed. The computing system comprises: computing devices (comprising first and second computing devices) each comprising two ports; and a signal transmission path connecting the computing devices in series. Each computing device is connected to the signal transmission path via the two ports. The first computing device is configured to receive, from the signal transmission path through one of the two ports, a signal specific to an address of the first computing device to a local storage device thereof. The second computing device is configured to receive, from the signal transmission path through one of the two ports, a signal to a local storage device thereof, and forward the signal, which is not specific to an address of the second computing device, or an adjusted version of the signal to the signal transmission path through one of the ports.