Digital Signal Delay Circuit for Exact Multi-Channel Synchronization
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Solution Overview
Problem
Conventional signal delay methods in memory apparatuses using two-layer circuit boards face challenges in signal channel line mismatch, leading to difficulties in controlling analog signals and requiring large circuit areas due to time-consuming try-and-error compensation techniques.
Innovation Solution
A signal delay apparatus comprising a period digitalization circuit, a delay control signal generator, and a delay circuit that digitalizes a reference clock signal to generate a digitalized reference period, allowing for precise delay control and synchronization of signal transmissions across multiple channels, thereby improving flexibility and reducing circuit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If analog signal compensation techniques are used to solve signal channel line mismatch, then signal transmission quality is improved, but device complexity and control difficulty increase
Solution Approach 1:
The patent replaces analog signal compensation mechanisms with a digital delay control system. Instead of using complex analog circuits to compensate for signal channel mismatches, the invention uses a digital delay control circuit that receives a delay control signal and adjusts signal delays through digital processing. This substitution of digital for analog systems reduces control complexity while maintaining signal transmission quality.
Solution Approach 2:
The patent changes the control parameter from analog signal adjustment to digital delay control. By using a delay control signal with digital values to adjust the delay time of signal channels, the system achieves precise control with simpler circuitry. The delay control circuit converts the digital delay control signal into appropriate delay adjustments for each signal channel, eliminating the need for complex analog compensation.
2Reliability
If continuous try-and-error compensation is used to achieve correct signal synchronization, then signal transmission quality is improved, but time consumption and circuit area increase
Solution Approach 1:
The patent implements preliminary action by pre-establishing the relationship between delay control signals and signal channel delays. Instead of performing continuous try-and-error compensation after signal transmission issues occur, the system pre-configures the delay control circuit with appropriate delay values based on the digital delay control signal. This allows the system to achieve correct signal synchronization directly without time-consuming iterative adjustments.
Solution Approach 2:
The patent uses feedback mechanisms to determine the appropriate delay control signal values. By monitoring signal transmission characteristics and using this feedback to set the initial delay control parameters, the system eliminates the need for continuous try-and-error compensation. The feedback information allows the delay control circuit to be pre-configured with optimal delay values, significantly reducing the time required to achieve signal synchronization.
Data Source
AI summary
A signal delay apparatus, including: a period digitalization circuit, for digitalizing a period of a reference clock signal to generate a digitalized reference period; a delay control signal generator, for generating a delay control signal according to the digitalized reference period, a reference frequency and a required delay indicating signal; and a delay circuit, for delaying an input signal to generate an output signal according to the required delay control signal.