Digital Delay Control for Multicarrier Peak Power Spikes

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Solution Overview

Problem

Existing wireless transmission systems face peak power handling challenges when multiple non-continuous signals on different carrier frequencies coincide in time, leading to high peak power requirements and potential non-linear effects in analog front-end circuitry.

Innovation Solution

A digital signal processing system that anticipates and delays bursted signals to prevent peak power coincidences, using a threshold detection and delay processor to strategically add delays to signals when their peaks align, thereby reducing peak power requirements without degrading waveform performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple non-continuous signals are transmitted simultaneously through a single RF front end, then system throughput and communication capability are improved, but peak power handling requirements increase and non-linear effects occur when voltage peaks coincide

Engineering Contradiction:
Improvesystem throughputVSAvoidpeak power handling requirement
Core Design Contradiction:
ProductivityVSPower

Solution Approach 1:

The system performs preliminary detection of signal peaks using a threshold detection component before the signals reach the analog front end. When potential peak coincidences are anticipated, delay instructions are issued in advance to shift signal timing and prevent peak alignment, thereby reducing peak power requirements before they can cause problems in the power amplifier

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system continuously monitors signal amplitudes and uses feedback from the threshold detection component to dynamically adjust signal timing. When peak coincidences are detected or anticipated, the feedback loop triggers delay instructions to modify signal timing, creating a closed-loop control system that adapts to real-time signal conditions to minimize peak power demands

Inventive Principle:
Principle #23Feedback

2Reliability

If the analog front end is designed to handle high peak power, then signal transmission reliability is improved, but device complexity and cost increase

Engineering Contradiction:
Improvesignal transmission reliabilityVSAvoidanalog circuitry complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system replaces the need for high-power-rated analog circuitry with a digital signal processing approach. Instead of designing the analog front end to handle peak power coincidences, the invention uses digital delay control to prevent peak alignment, substituting complex high-power analog design with simpler digital timing adjustments

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The digital signal processing system acts as an intermediary between the digital baseband signals and the analog power amplifier. By inserting a delay control layer in the signal path, the system mediates peak power issues before they reach the analog front end, allowing the use of lower-power-rated, simpler analog circuitry

Inventive Principle:
Principle #24Intermediary (Mediator)

3Use of energy by moving object

If signal peaks are allowed to align, then transmission efficiency is improved, but undesired non-linear effects occur in the power amplifier

Engineering Contradiction:
Improvetransmission efficiencyVSAvoidnon-linear effects
Core Design Contradiction:
Use of energy by moving objectVSObject-generated harmful factors

Solution Approach 1:

The system applies preliminary anti-action by detecting potential peak coincidences and issuing delay instructions before the harmful non-linear effects can occur in the power amplifier. The threshold detection component anticipates peak alignment and pre-empts it with timing adjustments, preventing the generation of harmful distortion products

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS10742467B1Digital dynamic delay for analog power savings in multicarrier burst waveforms
Publication Date: 2020.08.11 THE UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE NAVY
  • US10742467B1 patent drawing
  • US10742467B1 patent drawing
  • US10742467B1 patent drawing

AI summary

A signal processor is provided for use with a first signal generator and a second signal generator, wherein the first signal generator provides a first signal having a first amplitude and the second signal generator provides a second signal having a second amplitude. The signal processor includes: a threshold component that stores a threshold value; a threshold detection component that generates a sum of the first amplitude and the second amplitude, compares the sum with the threshold value, generates a modification required signal when the sum is greater than the threshold value; a delay component that generates a delay signal; and a delay processor operable to output an output signal based on the sum of a modified first signal and the second signal when the sum is greater than the threshold value.