Digital Delay Circuit with Reference Code and Delay Ratio Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Integrated circuits face limitations in providing a sufficient number of optional delay time lengths due to the constraints of fixed fuse codes, which restrict the range of achievable delay times.

Innovation Solution

A delay method and circuit that utilize separate registers for a delay reference code and a delay factor, allowing for the determination of a delay ratio and subsequent generation of varied delay times, thereby increasing the number of available delay time lengths and improving accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a fixed fuse code is used to set delay time, then the circuit structure is simple, but the number of optional delay time lengths is limited

Engineering Contradiction:
Improvecircuit structureVSAvoidnumber of optional delay time lengths
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The delay time configuration is segmented into two independent parts: a delay reference code stored in a first register and a delay factor stored in a second register. This segmentation allows the system to combine different reference codes with different delay factors to generate multiple delay time lengths, thereby increasing adaptability without significantly increasing circuit complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension by adding the delay factor as a separate configurable parameter. Instead of using a single fuse code, the system now operates in a two-dimensional space of (delay reference code, delay factor), which exponentially increases the number of achievable delay time lengths while maintaining relatively simple circuit structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If more delay time lengths are provided, then adaptability increases, but the complexity of delay control increases

Engineering Contradiction:
Improvenumber of optional delay time lengthsVSAvoiddelay control complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system dynamically calculates the delay time by combining the delay reference code and delay factor through multiplication. This dynamic approach allows the circuit to generate multiple delay time lengths on-demand rather than requiring pre-configured fixed fuse codes for each possible delay value, thereby increasing adaptability while keeping the control mechanism relatively simple.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent introduces a control unit as an intermediary that receives both the delay reference code and delay factor, performs the multiplication operation, and generates the final delay time. This intermediary component simplifies the overall control structure by centralizing the calculation logic, making it easier to manage complex delay configurations without proportionally increasing system complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8937500B2Delay method, circuit and integrated circuit
Publication Date: 2015.01.20 SEMICON COMPONENTS IND LLC
  • US8937500B2 patent drawing
  • US8937500B2 patent drawing
  • US8937500B2 patent drawing

AI summary

This document discusses, among other things, a delay circuit, in which a first register is written with a delay reference code, a second register is written with a delay factor, a control unit determines a corresponding delay ratio in a storage unit based on the delay factor in the second register, and sends the determined delay ratio to a first digital timing unit, the first digital timing unit determines a delay reference time based on the delay reference code in the first register, multiplies the delay reference time by the delay ratio to result in a desired delay time, and generates a delay.