Digital Deskew Algorithm for Hybrid Parallel-Serial Interfaces

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Solution Overview

Problem

High-speed interfaces face challenges in maintaining signal timing relationships and quality due to issues like skew, jitter, and crosstalk, especially with the transition to hybrid parallel-serial interfaces, which complicate the management of signal-to-signal timing relationships and require advanced methods for deskewing and timing parameter adjustment.

Innovation Solution

A deskew algorithm that performs statistical analysis on data transitions to realign signals by cycling through possible sampling strobe positions, detecting transitions in multiple sampling regions, and adjusting the strobe position based on a transition hysteresis constant to correct skew between clock and data signals, implemented in a high-speed receiver circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If hybrid parallel-serial interfaces are used to scale bus bandwidth, then interface bandwidth is improved, but signal timing relationship management becomes more complex

Engineering Contradiction:
Improveinterface bandwidthVSAvoidsignal timing relationship management
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent replaces traditional analog timing synchronization mechanisms with a digital deskew algorithm that uses statistical analysis of data transitions. Instead of relying on physical timing relationships and analog circuitry, the system uses digital signal processing to detect transitions, analyze their distribution, and dynamically adjust sampling strobe positions based on computed statistics, thereby simplifying timing management in hybrid parallel-serial interfaces

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent dynamically changes the sampling strobe position parameter based on statistical analysis results. The deskew algorithm computes transition distributions and uses these statistics to adjust the timing parameter (strobe position) in real-time, allowing the interface to adapt to varying skew conditions and maintain optimal sampling timing without complex fixed timing relationships

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If static timing parameters are used at the interface, then design simplicity is improved, but accuracy in handling skew and jitter deteriorates

Engineering Contradiction:
Improvedesign simplicityVSAvoidskew and jitter handling accuracy
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The patent implements dynamic timing adjustment through the deskew algorithm that continuously analyzes data transitions and adjusts sampling strobe positions in real-time. Instead of using fixed static timing parameters, the system adapts its sampling timing dynamically based on the actual signal characteristics and skew conditions, thereby achieving high precision in handling variable skew and jitter while maintaining relatively simple design

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The deskew algorithm performs self-adjustment by automatically analyzing its own sampling results and computing the necessary timing corrections. The system uses statistical analysis of transitions it detects to determine optimal strobe positions, enabling self-correction of timing errors without requiring complex external calibration or control mechanisms

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS7317775B1Switched deskew on arbitrary data
Publication Date: 2008.01.08 NAT SEMICON CORP
  • US7317775B1 patent drawing
  • US7317775B1 patent drawing
  • US7317775B1 patent drawing

AI summary

A method and circuit capable of handling skew between a clock and data signal up to +/− one half bit on a random input data pattern. A digital algorithm cycles through each data bit and individually deskews that bit by detecting data transitions in a first sampling region and in a second sampling region and determining a difference between a number of transitions in the first sampling region and a number of transitions in the second sampling region. The sampling regions and a deskew timing signal may then be incremented or decremented based on a comparison of the computed difference to a predetermined constant. If no transitions occur on a particular bit, the algorithm times out leaving the deskew timing signal in the original position. When analysis of a final bit of a channel is completed, the algorithm begins monitoring and analyzing the first bit of another channel.