Digital Display Driver Synchronizing Vertical Signals
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Solution Overview
Problem
Conventional organic light emitting displays face challenges in accurately expressing gradations due to variations in threshold voltage and electron mobility of transistors, leading to inconsistent luminance across pixels, and difficulties in synchronizing external and internal vertical synchronizing signals, resulting in undefined image portions.
Innovation Solution
A digital driving system is implemented, including a scan driver, data driver, timing controller, and vertical synchronizing signal synchronizing circuit, which alternately writes and reads data using frame memories and adjusts the main clock frequency to synchronize external and internal vertical synchronizing signals, ensuring phase alignment and precise control of pixel emission times to achieve uniform luminance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional analog drive with storage capacitor is used to control OLED luminance, then the pixel circuit can generate light corresponding to data signal, but exact expression of desired gradations becomes difficult due to variations in threshold voltage and electron mobility of transistors
Solution Approach 1:
The patent replaces the conventional analog voltage storage method with a digital driving system that uses frame memories to store and manage data signals. The timing controller distributes pixel data to frame memories, which then supply data to data drivers for precise control of OLED emission. This digital approach eliminates the reliance on transistor characteristics, achieving uniform luminance across pixels with accurate gradation expression.
2Manufacturing precision
If frame memories are used for digital driving with alternating write and read operations, then data can be precisely controlled, but synchronization between external and internal vertical synchronizing signals becomes complex
Solution Approach 1:
The patent employs a feedback mechanism where the timing controller monitors the synchronization status between external and internal vertical synchronizing signals. Based on this feedback, the timing controller adjusts the operation of frame memories to maintain proper synchronization. This feedback-based approach enables precise data control while managing synchronization complexity through intelligent coordination rather than complex circuit design.
3Productivity
If the timing controller alternately writes to and reads from frame memories, then data can be supplied to data drivers, but undefined image portions may occur if vertical synchronizing signals are not synchronized
Solution Approach 1:
The patent implements preliminary synchronization actions where the timing controller aligns the external and internal vertical synchronizing signals before initiating alternating write and read operations to frame memories. By pre-synchronizing these signals, the system ensures that data is correctly supplied to data drivers without causing undefined image portions, thereby maintaining both high productivity and reliable image display.
Data Source
AI summary
A digital driving system for a display includes a scan driver adapted to supply scan signals serially to scan lines of the display, a data driver adapted to supply a first data signal and a second data signal to data lines of the display, a timing controller adapted to control the scan driver and the data driver in accordance with a main clock, and to supply external data to the data driver, and a vertical synchronizing signal synchronizing circuit adapted to synchronize an internal vertical synchronizing signal and an external vertical synchronizing signal.