Digital Droop Detection With Nonlinearity Calibration
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Solution Overview
Problem
As semiconductor devices increase in integration and operating speed, power consumption also rises, leading to challenges in detecting and compensating for voltage droop phenomena, which can cause malfunctions, and existing digital droop detectors are vulnerable to process and temperature changes, necessitating a more effective solution.
Innovation Solution
A digital droop detector system that includes processing circuitry to detect voltage level changes, convert them into codes, correct nonlinearity, and adjust clock signal delays based on these codes, using a calibration method to compensate for process and temperature variations, thereby reducing power supply voltage margins and improving detection accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high guard band is set to prevent voltage droop, then reliability is improved, but power consumption increases
Solution Approach 1:
The patent dynamically adjusts the clock signal frequency based on detected voltage droop conditions. When droop is detected, the clock frequency is reduced to lower power consumption; when no droop occurs, the frequency is increased to improve performance. This dynamic parameter adjustment resolves the contradiction by adapting the system state rather than maintaining a fixed high guard band.
Solution Approach 2:
The patent implements a feedback mechanism where voltage droop is continuously monitored and detected. Based on this feedback, the clock frequency is automatically adjusted. This closed-loop control allows the system to maintain reliability only when necessary, reducing power consumption during normal operation while preventing droop-related malfunctions.
2Measurement precision
If digital droop detector is used to detect voltage droop, then measurement precision is improved, but device complexity increases due to vulnerability to process and temperature changes
Solution Approach 1:
The patent introduces an intermediary calibration mechanism that compensates for process and temperature variations. A calibration circuit measures and stores compensation values for different process and temperature conditions. These compensation values are used to adjust the droop detection thresholds, maintaining measurement precision without requiring complex real-time compensation circuits.
Solution Approach 2:
The patent performs calibration measurements in advance to determine compensation values for process and temperature variations. These calibration values are stored and applied during normal operation to correct droop detection readings. This preliminary action approach simplifies the device complexity by avoiding complex real-time compensation while maintaining measurement precision.
3Use of energy by moving object
If clock frequency is reduced to lower power consumption, then energy efficiency is improved, but productivity decreases
Solution Approach 1:
The patent dynamically adjusts the clock frequency based on real-time voltage droop detection. The system operates at high frequency when voltage is stable to maintain productivity, and switches to low frequency when droop is detected to reduce power consumption. This dynamic adaptation resolves the contradiction by making the system state variable rather than fixed.
Solution Approach 2:
The patent implements periodic voltage monitoring and clock frequency adjustment. The system continuously detects voltage levels and periodically changes clock frequency accordingly. This periodic action allows the system to maintain high productivity during normal operation while periodically reducing power consumption when droop conditions occur.
Data Source
AI summary
A digital droop detector for detecting whether a droop occurs in a power supply voltage, may include processing circuitry configured to, detect a voltage level change of a power supply voltage in response to a clock signal, the detecting the voltage level change including converting the detected voltage level change into a first code, correct at least one nonlinearity included in the first code, the correcting including converting the first code into a second code and a target range, and adjust a delay magnitude of the clock signal based on the second code.