Digital Duty Cycle Generation Using Computed Pulse Widths
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Solution Overview
Problem
Conventional techniques for generating periodic digital signals with selectable duty cycles in all-digital circuits are not suitable due to the need for analog components, which are not compatible with all-digital phase locked loops (ADPLLs).
Innovation Solution
An apparatus and method that utilize a computation block to determine a computed target cycle count by multiplying a selected duty cycle with the ratio of the periods of a reference signal and an oscillator signal, and a pulse width generator to produce a periodic digital signal with a pulse width corresponding to the computed target cycle count times the period of the oscillator signal, allowing for precise control of duty cycles without analog components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional techniques using analog components are used to generate periodic digital signals with selectable duty cycles, then duty cycle control is achieved, but compatibility with all-digital circuits is lost
Solution Approach 1:
The patent replaces analog circuitry with all-digital components including a computation block that calculates target cycle counts and a pulse width generator that produces duty cycle signals. This substitution eliminates the need for analog components while maintaining duty cycle control functionality, achieving full digital compatibility.
Solution Approach 2:
The patent changes the operating parameters from analog voltage/frequency control to digital cycle count control. The computation block calculates a target cycle count based on the desired duty cycle and the ratio between reference and oscillator signal periods, then the pulse width generator uses this digital parameter to control the output signal width, achieving duty cycle control through digital parameter manipulation.
2Measurement precision
If analog components are used for duty cycle generation, then duty cycle control is possible, but precision is reduced due to analog limitations
Solution Approach 1:
The patent substitutes analog control mechanisms with digital counting and timing mechanisms. The computation block performs precise digital calculations of the target cycle count, and the pulse width generator uses digital counters to achieve precise duty cycle control, eliminating the precision limitations inherent in analog circuits.
Solution Approach 2:
The patent uses digital counting to replicate the timing function that would otherwise require analog components. By counting oscillator cycles and generating pulses based on computed cycle counts, the system creates a digital copy of the analog duty cycle control function with superior precision.
Data Source
AI summary
All-digital techniques for generating periodic digital signals having selectable duty cycles. In one aspect, a computation block is provided for computing the product of a selected duty cycle and a discrete ratio between a reference clock period and a high-frequency oscillator period. The computation block may be coupled to a pulse width generator for generating signals having pulse widths that are integer multiples of the high-frequency oscillator period. In another aspect, a pulse width generator may also accommodate mixed fractional multiples of high-frequency oscillator periods by tapping the individual inverter stages of a delay line matched to the individual inverter stages of a ring oscillator exemplary embodiment of the high-frequency oscillator.