Digital Interpolation Filter Circuit With Cascaded Half-Band Stages
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Solution Overview
Problem
Existing digital interpolation filters for Sigma-delta audio DACs face complexity and operational faults due to large register arrays and complex pipeline controllers, leading to increased delay and area occupation, which affects the stability and accuracy of the circuit.
Innovation Solution
The implementation of an interpolation filtering system using a digital circuit with an interpolation filtering operation controller, cascaded drive modules, intermediate result cache RAM, and filter coefficient storage ROM, which includes cascaded filter operation modules and a master state machine to perform accumulation and multiplication operations, reducing unnecessary storage units and control logic through a cascaded half-band filter structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If parallel logic structure with large register arrays and complex pipeline controllers is used, then interpolation filtering function is achieved, but device complexity increases and area occupation increases
Solution Approach 1:
The interpolation filter is divided into multiple cascaded stages, where each stage performs a portion of the filtering operation. This segmentation reduces the complexity of individual stages while achieving the overall filtering function through composition, directly addressing the contradiction between functionality and complexity.
Solution Approach 2:
Multiple functional components including the filter operation module, state machine module, drive module, and memory modules are merged into an integrated circuit. This consolidation reduces the overall device complexity and area occupation compared to implementing these components as separate units, while maintaining the required interpolation filtering function.
2Area of stationary object
If parallel logic structure with large register arrays is used, then interpolation filtering function is achieved, but area occupation increases
Solution Approach 1:
The filter operation is segmented into multiple stages with each stage using smaller register arrays. The intermediate results are stored in memory modules and processed sequentially, reducing the peak memory requirements and chip area compared to a single large parallel structure.
Solution Approach 2:
Memory modules serve as intermediaries between the cascaded filter stages, storing intermediate results that would otherwise require large register arrays in a parallel structure. This allows the system to achieve the same filtering function with reduced chip area by using sequential processing with memory storage rather than parallel processing with large registers.
3Measurement precision
If digital circuit interpolation filter is used, then accuracy and linear phase are improved, but delay increases with number of stages
Solution Approach 1:
The filtering operation is divided into multiple stages that process signals sequentially. While this segmentation enables higher accuracy filtering, the patent optimizes each stage to minimize individual delay, and the modular structure allows for efficient resource utilization that reduces overall processing time compared to a single complex stage.
Solution Approach 2:
The state machine module pre-calculates control signals and prepares data for the filter operation modules in advance. This preliminary action reduces the actual filtering delay by having control and data preparation completed before the main filtering operation begins, optimizing the time-accuracy tradeoff.
4Ease of operation
If complex pipeline controllers are used, then interpolation filtering function is achieved, but ease of operation deteriorates
Solution Approach 1:
The state machine module serves multiple functions: it controls the drive module, manages memory operations, coordinates the cascaded filter stages, and generates timing signals. This multi-functionality eliminates the need for separate complex pipeline controllers, simplifying operation while maintaining the required filtering function.
Solution Approach 2:
The state machine module automatically manages the operation of the entire interpolation filter system, including data flow control, memory access coordination, and stage synchronization. This self-service capability eliminates the need for external complex control logic, making the circuit easier to operate while maintaining full functionality.
Data Source
AI summary
An interpolation filtering system implemented by a digital circuit is provided, it includes an interpolation filtering operation controller, a cascaded drive module, an intermediate result cache Random Access Memory (RAM), and a filter coefficient storage Read Only Memory (ROM). The intermediate result cache RAM is configured to store externally input data of the interpolation filtering system and intermediate results output by the filter operation modules. The filter coefficient storage ROM is configured to store filter coefficients required for calculation by the filter operation modules. The interpolation filtering operation controller is configured to control, under the drive of counting beats output by the cascaded drive module, the master state machine to select data of the intermediate result cache TAM or externally directly input data to be sent to the cascaded filter operation modules for accumulation operation, and to select the filter coefficients of the filter coefficient storage ROM for multiplication operation.