Digital Filter Loop Bandwidth Tuning for Phase Jitter Stability
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Solution Overview
Problem
Phase jitter in electronic circuits varies significantly across semiconductor dies due to factors like DCO phase noise, TDC resolution, and loop bandwidth, necessitating improved control methods.
Innovation Solution
An electronic circuit with a digital filter and jitter optimization device that processes signals to generate parameters for optimizing loop bandwidth, reducing phase jitter through background calibration and gear shifting functions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If loop bandwidth is adjusted to reduce phase jitter, then phase jitter is reduced, but circuit stability may be compromised
Solution Approach 1:
The system dynamically adjusts the loop bandwidth parameter based on measured phase jitter characteristics. The jitter optimization device continuously monitors phase error signals and adapts the loop bandwidth to optimal values, transforming a static parameter into a dynamic one that can be optimized in real-time to simultaneously reduce jitter and maintain stability
Solution Approach 2:
The system implements a feedback mechanism where the phase error signal from the phase detector is fed back through the loop filter to the DCO. This closed-loop feedback allows the system to automatically adjust and optimize loop bandwidth based on actual phase jitter conditions, enabling simultaneous jitter reduction and stability maintenance through continuous adaptation
2Measurement precision
If background calibration is performed to optimize parameters, then phase jitter is reduced, but additional circuit complexity is introduced
Solution Approach 1:
The background calibration function operates autonomously to optimize loop bandwidth and other parameters without requiring external intervention. The jitter optimization device automatically performs calibration sequences, measures phase jitter characteristics, and adjusts parameters to optimal values, enabling the circuit to self-optimize and reduce jitter while minimizing the need for additional complex external calibration equipment
Solution Approach 2:
The background calibration functionality is merged with the existing phase-locked loop circuit operations. The same phase detector, loop filter, and DCO components are utilized for both normal operation and calibration purposes, eliminating the need for separate dedicated calibration hardware and reducing overall circuit complexity while still achieving jitter optimization
Data Source
AI summary
An electronic circuit and a method for operating the electronic circuit are provided. The electronic circuit includes a digital filter and a jitter optimization device. The digital filter is configured to receive a first signal and generate a second signal by filtering the first signal. The jitter optimization device is configured to receive the second signal and generate a first parameter and a second parameter according to the second signal. The jitter optimization device is configured to provide a first feature and a second feature associated with the second signal, and the first parameter and the second parameter are generated in response to the first feature or the second feature.