Digital Filter Circuit for Nonlinear Compensation in LSI
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The high circuit scale of digital filters required for nonlinear compensation in optical communication systems leads to issues with unit cost, power consumption, and feasibility, particularly in LSI design, as existing solutions like FIR and IIR filters face challenges in achieving high-speed operation and efficient signal processing.
Innovation Solution
A digital filter device that includes data rearrangement, intermediate data calculation, filter output first and second calculation, and delay mechanisms to reduce circuit scale while maintaining performance, utilizing a signal processing method that rearranges input data, processes intermediate data, and calculates output values using recurrence formulas to achieve efficient nonlinear compensation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a general FIR filter is used for nonlinear compensation, then filtering performance is achieved, but circuit scale increases to several hundred Mega gates making LSI realization difficult
Solution Approach 1:
The patent segments the FIR filter into multiple IIR filter sections that process signals in parallel. Each IIR filter handles a portion of the frequency spectrum, and their outputs are combined to achieve the overall filtering effect. This segmentation reduces the circuit scale from several hundred Mega gates to a manageable level suitable for LSI realization while maintaining filtering performance.
Solution Approach 2:
The patent merges multiple IIR filter outputs through addition to reconstruct the final filtered signal. By combining the results from parallel IIR filter sections, the system achieves equivalent filtering performance to a full FIR filter but with significantly reduced circuit complexity in each individual section.
2Productivity
If the number of digital signal processing circuits is increased to fill the rate gap between optical communication and digital signal processing, then processing speed is improved, but circuit scale exceeds LSI design limits
Solution Approach 1:
The patent employs dynamic signal processing where IIR filters recursively process signals using feedback from previous outputs. This dynamic approach allows each circuit to perform multiple processing operations sequentially, effectively increasing processing throughput without proportionally increasing circuit scale. The recursive nature of IIR filters enables high-speed processing within LSI design limits.
3Device complexity
If a digital filter with reduced circuit scale is used, then LSI realization becomes feasible, but filtering performance may be impaired
Solution Approach 1:
The patent designs IIR filter sections that can be replicated and configured in parallel to handle different frequency ranges. Each IIR filter section is a universal building block that can be tuned and combined with others to achieve various filtering characteristics. This multi-functionality allows the reduced-scale IIR sections to collectively provide FIR-level performance across the entire frequency spectrum.
Data Source
AI summary
Provided is a digital filter device including data rearrangement means for executing rearrangement of input data and outputting rearranged data, intermediate data calculation means for processing the rearranged data input at a specific time and generating intermediate data, filter output first calculation means for calculating a first output value at the specific time by use of the intermediate data, delay means for delaying the rearranged data by processing time taken in the intermediate data calculation means and the file output first calculation means, and filter output second calculation means for inputting output values from the delay means and the filter output first calculation means, calculating a second output value at a time other than the specific time, and outputting a filter output value obtained by adding up the first and second output values. Consequently, it becomes feasible to reduce a circuit scale without impairing performance of a digital filter used in nonlinear compensation and realize nonlinear compensation by an LSI.