Reconfigurable Digital Filter Processor for Dynamic Topology Switching
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Solution Overview
Problem
Current filter processors in wireless communication technologies are limited in adapting to various communication technologies due to their fixed filter topology, which cannot be modified during operation, leading to suboptimal performance across different environments.
Innovation Solution
A reconfigurable digital signal filter processor that allows dynamic modification of filter connections and parameters, enabling the implementation of multiple filter topologies and transfer functions through a controller that generates control signals for multiplexers to select inputs and combine outputs, thereby adapting to different communication technologies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If filter topology is fixed at design time, then device complexity is reduced and ease of manufacture is improved, but adaptability to different communication technologies deteriorates
Solution Approach 1:
The filter processor implements dynamic reconfiguration of filter topology by using multiplexers to selectively connect filter blocks in different configurations. The topology changes from fixed to dynamically adjustable, allowing the same hardware to adapt to various communication technologies (GSM, WCDMA, LTE) by reconfiguring the data pathway connections between filter components during operation.
Solution Approach 2:
The filter processor is designed as a universal platform that can perform multiple filtering functions across different communication standards. By incorporating reconfigurable elements (multiplexers, selectable filter blocks), a single device can serve multiple purposes - implementing different filter topologies (ladder, lattice, cascade) and transfer functions (IIR, FIR) to support various wireless communication technologies without requiring separate dedicated processors for each standard.
2Adaptability or versatility
If filter topology is reconfigurable, then adaptability to different communication technologies is improved, but device complexity increases
Solution Approach 1:
The filter processor is segmented into modular filter blocks (first filter block, second filter block, third filter block) that can be independently configured and connected. Each filter block can be selectively enabled or disabled, and their connections are controlled by multiplexers. This segmentation allows the complex reconfiguration function to be broken down into manageable modular units, making the overall complexity more controllable while maintaining high adaptability.
Solution Approach 2:
Multiplexers are introduced as intermediary components that mediate the connections between filter blocks. Instead of directly complex interconnections between all filter components, the multiplexers act as intelligent switches that selectively route signals between different filter blocks based on the desired topology. This intermediary layer simplifies the control logic and makes the reconfiguration process more manageable while achieving the desired adaptability.
3Adaptability or versatility
If filter coefficients are varied, then filtering characteristics can be tuned, but overall filter topology cannot be modified
Solution Approach 1:
The invention merges two previously separate functionalities - coefficient variation and topology modification - into a single reconfigurable filter processor. By combining the ability to adjust filter coefficients with the ability to reconfigure the data pathway topology (using multiplexers to change connections between filter blocks), the system achieves both fine-grained filtering characteristic tuning and coarse-grained structural adaptation, enabling support for multiple communication technologies with a unified platform.
Data Source
AI summary
A reconfigurable digital signal filter processing unit for use in a communication device is provided. The reconfigurable filters processor can implement different filter topologies to adapt to a range or wireless technology characteristics. The reconfigurable filter processor comprises a plurality of filter blocks whose inputs can be selected based on the desired configuration of the filter. Each filter block applies a transfer function to a received signal to achieve a desired filtering function.