Digital Frequency Measurement Using CIC Filtering for Resolution and Speed
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Solution Overview
Problem
Conventional digital frequency measuring techniques face challenges in simultaneously achieving high frequency resolution and sampling rate, often requiring a trade-off between the two, which limits their effectiveness in distinguishing between close input frequencies and maintaining a wide frequency input range.
Innovation Solution
A digital frequency measuring apparatus comprising a frequency divider, period counter, and digital filter, which uses a decimator cascade integrator comb (CIC) filter to amplify period count values and convert them into frequency outputs, allowing for improved frequency resolution and sampling rate through the use of a predetermined stage number and decimator factor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the sampling rate is increased to improve frequency measurement speed, then the sampling rate is improved, but the frequency resolution degrades
Solution Approach 1:
The patent divides the frequency measurement process into multiple stages using a multi-stage CIC filter structure. Each stage processes a portion of the frequency data, allowing the system to achieve high frequency resolution through cumulative filtering while maintaining high sampling rates. The segmentation of the filtering process enables independent optimization of each stage's parameters.
Solution Approach 2:
The patent transitions from single-stage filtering to multi-stage filtering, adding a dimensional aspect to the frequency resolution improvement. By stacking multiple filter stages, the system achieves frequency resolution enhancement without directly increasing the sampling rate, effectively moving the solution to another dimension of system design.
2Measurement precision
If the frequency resolution is increased to improve measurement precision, then the frequency resolution is improved, but the measurement time increases, degrading the sampling rate
Solution Approach 1:
The patent performs preliminary frequency division using a frequency divider before the main filtering process. This preliminary action reduces the input frequency to a manageable range, allowing the subsequent CIC filter stages to achieve high frequency resolution more efficiently without requiring excessive measurement time.
Solution Approach 2:
The patent replaces traditional mechanical counting methods with a digital CIC filter-based measurement system. This substitution enables parallel processing of frequency data through multiple filter stages, significantly reducing measurement time while maintaining or improving frequency resolution compared to sequential mechanical counting approaches.
3Measurement precision
If an internal oscillator with high frequency is used to increase measurement resolution, then the frequency resolution is improved, but the sampling rate decreases
Solution Approach 1:
The patent employs a dynamic frequency divider that can adjust its division ratio based on the input signal characteristics. This dynamic adjustment allows the system to optimize the effective sampling rate for different input frequencies while maintaining high frequency resolution through the multi-stage CIC filter, avoiding the static limitation of fixed-frequency oscillators.
Solution Approach 2:
The patent changes the operational parameters of the frequency measurement system by using programmable division ratios in the frequency divider and adjustable filter coefficients in the CIC filter stages. These parameter changes enable the system to adapt to different measurement requirements, achieving high frequency resolution without being constrained by a fixed high-frequency oscillator that would limit the sampling rate.
Data Source
AI summary
A digital frequency measuring apparatus includes a frequency divider dividing an input frequency signal and providing a divided frequency signal; a period counter counting clock cycles in a period of the divided frequency signal using a clock signal and providing a period count value for each period; and a digital filter amplifying the period count value using an accumulated gain, converting an amplified period count value into a frequency, and providing a first digital output value. The digital filter determines the accumulated gain using a predetermined stage number and a predetermined decimator factor.


