Self-Oscillating Digital Glitch Filter for Low-Power Reliability
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Solution Overview
Problem
Conventional digital glitch filters consume dynamic power due to continuous clock generation, compromising low power design and leading to potential malfunctioning in digital circuits.
Innovation Solution
A digital glitch filter that uses a self-oscillating circuit with a configurable delay cell and a ripple counter to generate a divided clock signal, enabling the circuit only when necessary, and toggling the filtered output signal based on a valid signal generated by a counter and comparator.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional digital glitch filter uses a free running clock to continuously filter glitches, then the filtering reliability is improved, but the dynamic power consumption increases
Solution Approach 1:
The patent implements periodic action by using an enable signal to activate the glitch filter only during specific periods when glitch filtering is needed, rather than continuously operating. The free running clock is gated through an enable signal that is generated based on detection of signal transitions, causing the filter to operate periodically only when required. This resolves the contradiction by maintaining filtering reliability during critical periods while reducing overall power consumption through intermittent operation.
Solution Approach 2:
The patent applies self-service by implementing a self-starting mechanism where the glitch filter automatically activates when it detects a signal transition. The enable signal is generated internally by detecting edges on the input signal, eliminating the need for an external continuous clock. The system serves itself by autonomously determining when filtering is needed and activating accordingly, thus maintaining reliability while reducing power consumption.
2Measurement precision
If the self-oscillating circuit is enabled continuously to ensure glitch detection, then the detection accuracy is improved, but the power consumption increases
Solution Approach 1:
The self-oscillating circuit is operated periodically rather than continuously by gating its output with an enable signal. The circuit generates self-oscillating clocks only when the enable signal is active, which occurs during signal transitions when glitch detection is needed. This periodic operation maintains detection accuracy during critical periods while dramatically reducing average power consumption by keeping the oscillating circuit inactive during stable periods.
Solution Approach 2:
The patent changes the operational state parameter of the self-oscillating circuit from continuous to conditional based on the enable signal. When the enable signal is high, the circuit operates with full functionality for accurate glitch detection. When the enable signal is low, the circuit is disabled to save power. This dynamic parameter change allows the system to adapt between accuracy and power consumption based on operational needs.
Data Source
AI summary
A digital glitch filter for filtering glitches in an input signal includes a first flip-flop for generating a filtered output signal, and a self-oscillating circuit for generating a self-oscillating clock signal. A first logic gate enables the self-oscillating circuit when the filtered output signal is not equal to the input signal. A ripple counter generates a divided clock signal by dividing the self-oscillating clock signal. A counter and comparator counts the divided clock signal to obtain a count number and compares the count number with a predetermined count target. A second flip-flop, which is connected to the counter and comparator, generates a valid signal, which is activate when the count number reaches the count target. The valid signal is input to the first flip-flop such that the filtered output signal toggles when the valid signal is active.