Digital Integrator Circuit for Drift-Free Power Save Resumption
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Solution Overview
Problem
Conventional integrators in low power applications, such as portable devices, experience integral value drift when powered off and resumed, leading to discontinuity in operation.
Innovation Solution
A digital integrator comprising a comparator, up/down counter, and current-steering digital-to-analog converter, which replicates the integrating function using digital counting, ensuring no loss of integral value when switched off, and rapidly resumes accurate operation upon power resumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a conventional analog integrator is used in low power applications with power save mode, then power consumption is reduced during idle periods, but the integral value drifts over time causing discontinuity upon resumption of operation
Solution Approach 1:
The patent creates a digital copy of the integrator's state by using a counter to store the integral value in digital form. This digital representation accurately captures the integrator's state without the drift issues of analog storage, allowing seamless resumption of operation after power save mode.
Solution Approach 2:
The patent replaces the analog mechanical integrator circuit with a digital counting system. The continuous analog integration process is substituted with discrete digital counting, which can be precisely stored and restored without degradation or drift over time.
2Reliability
If a digital counter is used to replicate the integrating function, then the integral value is preserved without drift when switched off, but the device complexity increases compared to conventional analog integrators
Solution Approach 1:
The patent changes the fundamental parameter representation from continuous analog voltage to discrete digital counts. This parameter transformation enables exact storage and restoration of the integral value, eliminating drift while the resulting complexity is managed through efficient digital circuit design.
3Measurement precision
If an analog integrator is continuously operated to maintain accuracy, then integral value accuracy is preserved, but power consumption increases preventing effective power save mode
Solution Approach 1:
The patent performs preliminary action by capturing and storing the integrator's state in digital form before entering power save mode. This advance preparation allows the system to power down completely without losing accuracy, as the digital state can be precisely restored when operation resumes.
Data Source
Figure 1~2
AI summary
An integrator is provided with protection against drift in the value of an integral during power save mode. An N-bit counter (12) is driven by the output of a comparator (11) to provide a digital count representation of the integral. The digital count is fed as an input to a current-steering digital-to-analog converter (14) which provides a current of corresponding analog magnitude to other circuitry, such as to an input stage of an error amplifier. The digital count is maintained during power save mode, preserving the integral value until resumption of normal operation.