Digital I/O Pin Configuration Detection Using Temporal Sampling
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Solution Overview
Problem
Conventional joystick tracking mechanisms are limited in configuring multiple levels beyond binary settings, often requiring analog to digital converters or comparators, and struggle to efficiently determine chip configurations using digital I/O pins.
Innovation Solution
An internal circuit and control module within an Integrated Circuit (IC) device operate in conjunction with external passive circuits applied to digital I/O pins, generating specific sequences of states through pre-selected triggering signals to determine chip configurations among multiple options.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional joystick tracking mechanisms use binary strap pins (strapped low or strapped high), then the configuration setting is simple, but the number of configuration levels is limited to 2
Solution Approach 1:
The patent segments the configuration detection process into multiple discrete sampling points (at least two different time points) within a single clock cycle. By sampling the digital I/O pin state at different moments, the system can detect multiple configuration levels using the same binary strap pin infrastructure, thereby increasing adaptability without adding complex hardware.
Solution Approach 2:
The patent employs periodic sampling of the digital I/O pin state at predetermined time points during initialization. This periodic action allows the system to capture transient states of the strap pin that correspond to different configuration levels, enabling multi-level detection using simple binary strap pins without requiring additional analog-to-digital converters or comparators.
2Adaptability or versatility
If analog to digital converters or comparators are used to achieve more than 2 configuration levels, then the number of configuration options increases, but the device complexity and hardware requirements increase
Solution Approach 1:
The patent extracts the configuration detection function from dedicated analog-to-digital converters or comparators and implements it using the existing digital I/O pin infrastructure. By taking out the need for separate conversion hardware and using temporal sampling of digital states, the system achieves multi-level configuration detection with minimal hardware overhead.
Solution Approach 2:
The system uses its own digital I/O pin to perform both the configuration setting and the configuration detection functions. The strap pin that sets the configuration also serves as the sensor for detecting the configuration by sampling its own state at different time points, eliminating the need for separate detection hardware.
3Adaptability or versatility
If multiple digital I/O pins are used to increase configuration options, then the number of apparatus characteristics increases, but the pin usage efficiency decreases
Solution Approach 1:
The patent makes the digital I/O pin universal by enabling it to encode multiple configuration levels through temporal sampling. A single pin can represent multiple configuration states by being in different voltage states at different sampling moments, thereby increasing adaptability while maintaining high pin usage efficiency.
Solution Approach 2:
The patent adds a temporal dimension to the configuration detection process. Instead of using multiple pins in parallel (spatial dimension), the system uses a single pin sampled at multiple time points (temporal dimension). This transforms the detection mechanism from spatial multiplicity to temporal multiplicity, achieving the same configurational capacity with fewer pins.
Data Source
AI summary
An Integrated circuit (IC) device accommodating a circuit and associated control module, being operative to determine an apparatus characteristic in accordance with one out of few selectable characteristics. The circuit is operative in conjunction with more than three of a plurality of external passive circuits corresponding to the plurality of apparatus characteristics, and includes (N≥1) digital I/O pins. The control module is operative to: (i) in response to a series of triggering signals, generate samples of the digital I/O pin's state that correspond to a plurality of different sequences of states when each of the plurality of external circuits is respectively applied to the pin and (ii) determining, from the samples, which of the plurality of different sequences of states has occurred that corresponds to the individual external circuit that has been applied to the pin; and (iii) determining an individual apparatus characteristic which corresponds to the determined sequence.