Capacitive Digital Isolator Biasing for Common-Mode Transient Immunity

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Solution Overview

Problem

Existing silicon digital isolators fail to adequately tolerate large common mode transient voltage changes between transmitter and receiver chips, leading to signal corruption and limited data transfer rates due to the inability of active circuits to respond quickly to common mode transients without high power consumption.

Innovation Solution

Employing a common mode biasing technique in transmitter and receiver circuits using passive impedance loads that present a real impedance equivalent to a resistive load, absorbing common mode transient currents without active circuits, thus maintaining performance during arbitrarily long durations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If active circuits are used to detect and cancel common mode transients, then common mode transient immunity is improved, but power consumption increases and response speed is limited

Engineering Contradiction:
Improvecommon mode transient immunityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts the active detection and cancellation circuits from the system, replacing them with passive impedance loads. This removes the power-consuming active components while maintaining the common mode transient immunity function through passive circuit elements that naturally handle transient currents without requiring active intervention.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The passive impedance loads automatically handle common mode transient currents through their inherent electrical properties without requiring active control or detection circuits. The circuit serves itself by using the natural behavior of passive components to reject common mode transients, eliminating the need for power-consuming active circuits.

Inventive Principle:
Principle #25Self-service

2Reliability

If active circuits are used to respond to common mode transients, then signal integrity is maintained, but data transfer rate is limited due to response time constraints

Engineering Contradiction:
Improvesignal integrityVSAvoiddata transfer rate
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent removes active response circuits that limit data transfer rates due to their finite response times. By extracting these active components and replacing them with passive impedance loads, the system achieves instantaneous response to common mode transients without the speed limitations inherent in active circuit switching and detection mechanisms.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical/electronic active circuit response mechanism with a passive electrical field-based mechanism. The passive impedance loads respond to common mode transients through instantaneous electrical field effects rather than through active component switching, thereby eliminating response time delays and enabling higher data transfer rates while maintaining signal integrity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Use of energy by stationary object

If passive impedance loads are used instead of active circuits, then power consumption is reduced and response speed is improved, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidcircuit complexity
Core Design Contradiction:
Use of energy by stationary objectVSDevice complexity

Solution Approach 1:

The patent changes the operational parameters of the circuit by replacing active components with passive impedance loads having specific resistance, inductance, and capacitance values. This parameter change allows the circuit to achieve the desired common mode transient immunity with reduced power consumption while the apparent complexity is managed through careful selection and configuration of passive component values.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution ensures that the digital isolator maintains signal integrity and high data transfer rates by tolerating large common mode transient currents without degrading performance, as it does not rely on active circuits to detect and cancel these events.

Implementation Method 1

capacitive barrier for galvanic isolation

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

passive impedance loads that present a real impedance equivalent to a resistive load, absorbing common mode transient currents

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentUS12388682B2Systems and methods for improving common mode transient immunity in silicon digital isolators using capacitive barrier for galvanic isolation
Publication Date: 2025.08.12 KINETIC TECHNOLOGIES INTERNATIONAL HOLDINGS LP
  • US12388682B2 patent drawing
  • US12388682B2 patent drawing
  • US12388682B2 patent drawing

AI summary

Systems and methods are disclosed for improving common mode transient immunity in silicon digital isolators using capacitive barrier for galvanic isolation. The systems include transmitters and receivers that include differential amplifiers. The differential amplifier may include a first transistor electrically coupled between a first input of the transmitter and a first output of the transmitter, a second transistor electrically coupled between a second input of the transmitter and a second output of the transmitter, a first passive load electrically coupled between the first output of the transmitter and a source rail, and a second passive load electrically coupled between the second output of the transmitter and the source rail, wherein the first and second passive loads have the same impedance; and a bias voltage source configured to bias a gate of the first transistor and a gate of the second transistor.