Digital Isolator Interlock for Complementary PWM Shoot-Through Prevention
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Solution Overview
Problem
Existing power drivers face challenges in preventing shoot-through current due to overlapping complementary PWM control signals, which can occur during power up/down or due to software or hardware faults, leading to potential damage or degradation of the power driver and connected systems.
Innovation Solution
A multi-channel digital isolator is introduced, which includes a digital isolator and an interlock circuit. The interlock circuit is configured to prevent overlapping active states between isolated PWM signals and their complementary signals, using logic gates and output buffers to ensure correct signal alignment and prevent shoot-through current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If discrete interlock circuits are implemented on the logic side to prevent overlapping PWM control signals, then shoot-through current prevention is improved, but device area, cost, and bill of materials increase
Solution Approach 1:
The interlock circuit is merged with the digital isolator into a single integrated device. The isolator includes a transmitter, receiver, isolation barrier, and output buffer, with the interlock logic implemented using XOR and AND gates that operate on the isolated signals. This integration eliminates the need for separate discrete interlock circuits while maintaining shoot-through prevention functionality.
Solution Approach 2:
The digital isolator acts as an intermediary device that not only transfers PWM control signals across galvanic isolation but also performs interlock functions. The isolator's internal logic gates (XOR and AND gates) serve as intermediaries that detect overlapping conditions and prevent shoot-through current by controlling the complementary PWM outputs, combining isolation and protection functions in one component.
2Reliability
If conventional separate implementations of isolator and interlock circuit are used, then functionality is achieved, but system area and component count increase
Solution Approach 1:
The patent combines the digital isolator and interlock circuit into a single integrated device. The isolator's transmitter, receiver, and isolation barrier are integrated with interlock logic gates that operate on the isolated PWM signals. This merger reduces the total system area by eliminating separate interlock circuit components and their associated mounting space.
Data Source
AI summary
A multi-channel digital isolator includes a digital isolator and an interlock circuit. The isolator includes a transmitter having a transmitter output, a receiver having a receiver input and a receiver output, an isolation barrier coupled between the transmitter output and the receiver input, and an output buffer having a buffer input and configured to output an isolated signal. The transmitter is configured to transmit an input signal across the isolation barrier. The interlock circuit has an interlock input coupled to the receiver output and an interlock output coupled to the buffer input. The interlock module is configured to prevent overlapping active states between the first isolated signal and a complementary isolated signal. In some implementations, the digital isolator also includes a dead-time insertion circuit.