Digital Isolator Circuit for High Common-Mode Transient Immunity
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Solution Overview
Problem
Conventional isolation circuits face challenges in achieving high common mode transient immunity while maintaining reliable data transmission without propagation delay, as they are prone to errors due to transient common noise and are not designed to handle high VGND voltages effectively.
Innovation Solution
A digital isolator module with a high-speed detecting mechanism is introduced, featuring a source type and sink type transient control unit, using PMOS and NMOS current sources to compensate for interfered currents based on the waveform and voltage level of transient noise, ensuring synchronized output signals without propagation delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional RX scheme circuits are used, then the circuit structure is simple, but the circuit cannot tolerate high VGND voltages and transmission errors occur
Solution Approach 1:
The patent applies preliminary anti-action by detecting transient common noise before it causes transmission errors and preemptively adjusting the sampling timing. The noise detection circuit monitors VGND voltage in real-time, and when transient noise is detected, the sampling clock is dynamically adjusted to sample during the noise-free period, thereby preventing errors before they occur.
Solution Approach 2:
The patent implements feedback by using the detected transient common noise information to adjust the sampling clock timing. The noise detection circuit provides feedback about the noise state to the sampling control mechanism, which then modifies the sampling timing accordingly, creating a closed-loop system that adaptively responds to noise conditions.
2Reliability
If delay circuit is introduced to suppress transients, then common mode transient immunity is improved, but propagation delay increases
Solution Approach 1:
The patent applies dynamics by making the sampling timing adjustable rather than fixed. The sampling clock's phase and timing are dynamically modified based on real-time noise detection, allowing the system to adapt to transient conditions without requiring fixed delay circuits. This dynamic adjustment enables the system to maintain high CMTI while minimizing unnecessary delays.
Solution Approach 2:
The patent changes the timing parameter of the sampling clock dynamically based on noise conditions. Instead of using a fixed delay circuit that always introduces time loss, the system adjusts the sampling timing parameter in real-time, changing it only when necessary to avoid noise, thereby reducing overall transmission delay while maintaining immunity.
3Ease of operation
If sampling is performed at fixed timing, then the circuit operation is simple, but transmission errors occur during transient noise
Solution Approach 1:
The patent applies preliminary action by detecting the presence of transient noise before the sampling operation occurs. The noise detection circuit operates in advance to identify upcoming noise events, and the sampling timing is adjusted accordingly before the actual sampling takes place, ensuring accurate data capture despite the added complexity.
Solution Approach 2:
The patent uses feedback to maintain reliability while managing complexity. The system continuously monitors noise conditions and provides feedback to adjust sampling timing, creating an adaptive operation mode that improves reliability. Although this adds operational complexity compared to fixed timing, the feedback mechanism automates the adjustment process, making the system self-regulating.
Data Source
AI summary
A digital isolator module for high level common mode transient immunity is provided, comprising a transmitter circuit (TX), a receiver circuit (RX) and an isolation barrier which is connected there in between, wherein the transmitter circuit is electrically connected to a first ground voltage level and the receiver circuit is electrically connected to a second ground voltage level. The receiver circuit further comprises a resistance set, a high speed detector and a demodulator. By employing the proposed circuit diagram of the invention, interferences occurring at the common mode are suppressed and an RX output signal is synchronized with its input signal without having propagation delay.