Digital Linear Voltage Regulator for CMOS Stability
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Solution Overview
Problem
Conventional linear voltage regulators face challenges in stabilizing feedback loops over a wide range of load current conditions while maintaining bandwidth, especially in low-power VLSI systems where load currents can change dramatically and rapidly, making them unsuitable for integration in modern CMOS technologies.
Innovation Solution
A digital linear voltage regulator design incorporating a comparator, finite state machine, and current digital-analog converter (DAC) that generates a binary output and digital word to control current delivery to the load, allowing for agile and stable voltage regulation across varying load conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional linear voltage regulator designs are used, then feedback loop stability can be achieved under certain load conditions, but the regulator cannot handle rapid and dramatic changes in load current
Solution Approach 1:
The patent replaces the traditional analog feedback control system with a digital control system. The analog error amplifier and continuous feedback loop are substituted with a digital regulator that samples voltages, processes data through logic circuits, and controls the pass transistor using digital signals. This substitution enables the system to achieve both stability and rapid response to load changes by leveraging the speed and precision of digital processing.
Solution Approach 2:
The patent implements dynamic control through a digital system that can rapidly adjust its operation in response to changing load conditions. The digital regulator uses sampled voltage data and logical processing to dynamically modify the control signal to the pass transistor, enabling fast response to load transients while maintaining stable regulation. The system transitions from static analog control to dynamic digital control that can adapt to varying conditions.
2Reliability
If the feedback loop is designed for stability with large capacitors and high output resistance, then bandwidth is reduced and response time increases
Solution Approach 1:
The patent replaces the analog feedback system with large capacitors and high output resistance that inherently limit bandwidth with a digital control system. The digital regulator uses sampled voltage data, logical processing, and digital control signals to achieve stability without requiring large compensation capacitors. This substitution removes the fundamental bandwidth-limiting constraints of analog compensation networks while maintaining stable operation.
Solution Approach 2:
The patent employs periodic sampling of the output voltage and reference voltage at discrete time intervals. This periodic action allows the digital system to monitor and control the output without requiring continuous analog feedback paths with large capacitors. The sampled-data approach enables fast response times while maintaining stability through periodic correction rather than continuous analog compensation.
3Ease of operation
If analog error amplifiers are used to sense residual voltage differences, then continuous control is achieved, but the system cannot operate at high frequencies with rapid load transitions
Solution Approach 1:
The patent substitutes the analog error amplifier with a digital voltage sensing and comparison system. Instead of using an analog amplifier to continuously sense and amplify residual voltage differences, the digital regulator samples the output and reference voltages, compares them using digital logic, and generates appropriate control signals. This substitution enables high-frequency operation and rapid response to load transitions while maintaining effective voltage control through digital processing.
Solution Approach 2:
The patent replaces continuous analog sensing with periodic voltage sampling at discrete time intervals. The digital regulator samples the output voltage and reference voltage, processes the difference through logical operations, and updates the control signal accordingly. This periodic sampling approach enables the system to operate at high frequencies and respond rapidly to load transitions while maintaining effective voltage regulation through discrete control updates.
Data Source
AI summary
A digital linear voltage regulator includes a comparator, a finite state machine, and a current digital-to-analog converter (DAC). The comparator is preferably coupled to receive a reference voltage and an operating voltage supplied to a dynamic load. The comparator generates, during a clock cycle, a binary output based on a comparison between reference and operating voltages. The finite state machine (FSM) is coupled to receive at least one control signal that indicates a target operating state for the digital linear voltage regulator. The FSM receives the binary output from the comparator and generates a digital word, during a clock cycle, based on the target operating state of the digital linear voltage regulator and on the binary output. The current DAC is coupled to the FSM, receives the digital word and delivers current at the desired voltage to the dynamic load.